Musicpal ram access cleanup.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7061 c046a42c-6fe2-441c-8c8c-71466251a162
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4465449097
commit
930c86820e
149
hw/musicpal.c
149
hw/musicpal.c
@ -72,30 +72,6 @@ static uint32_t gpio_isr;
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static uint32_t gpio_out_state;
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static uint32_t gpio_out_state;
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static ram_addr_t sram_off;
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static ram_addr_t sram_off;
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/* Address conversion helpers */
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static void *target2host_addr(uint32_t addr)
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{
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if (addr < MP_SRAM_BASE) {
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if (addr >= MP_RAM_DEFAULT_SIZE)
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return NULL;
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return (void *)(phys_ram_base + addr);
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} else {
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if (addr >= MP_SRAM_BASE + MP_SRAM_SIZE)
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return NULL;
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return (void *)(phys_ram_base + sram_off + addr - MP_SRAM_BASE);
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}
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}
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static uint32_t host2target_addr(void *addr)
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{
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if (addr < ((void *)phys_ram_base) + sram_off)
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return (unsigned long)addr - (unsigned long)phys_ram_base;
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else
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return (unsigned long)addr - (unsigned long)phys_ram_base -
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sram_off + MP_SRAM_BASE;
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}
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typedef enum i2c_state {
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typedef enum i2c_state {
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STOPPED = 0,
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STOPPED = 0,
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INITIALIZING,
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INITIALIZING,
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@ -253,7 +229,7 @@ typedef struct musicpal_audio_state {
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uint32_t status;
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uint32_t status;
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uint32_t irq_enable;
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uint32_t irq_enable;
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unsigned long phys_buf;
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unsigned long phys_buf;
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int8_t *target_buffer;
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uint32_t target_buffer;
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unsigned int threshold;
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unsigned int threshold;
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unsigned int play_pos;
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unsigned int play_pos;
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unsigned int last_free;
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unsigned int last_free;
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@ -265,6 +241,7 @@ static void audio_callback(void *opaque, int free_out, int free_in)
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{
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{
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musicpal_audio_state *s = opaque;
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musicpal_audio_state *s = opaque;
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int16_t *codec_buffer;
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int16_t *codec_buffer;
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int8_t buf[4096];
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int8_t *mem_buffer;
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int8_t *mem_buffer;
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int pos, block_size;
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int pos, block_size;
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@ -281,7 +258,12 @@ static void audio_callback(void *opaque, int free_out, int free_in)
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if (free_out - s->last_free < block_size)
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if (free_out - s->last_free < block_size)
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return;
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return;
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mem_buffer = s->target_buffer + s->play_pos;
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if (block_size > 4096)
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return;
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cpu_physical_memory_read(s->target_buffer + s->play_pos, (void *)buf,
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block_size);
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mem_buffer = buf;
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if (s->playback_mode & MP_AUDIO_16BIT_SAMPLE) {
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if (s->playback_mode & MP_AUDIO_16BIT_SAMPLE) {
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if (s->playback_mode & MP_AUDIO_MONO) {
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if (s->playback_mode & MP_AUDIO_MONO) {
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codec_buffer = wm8750_dac_buffer(s->wm, block_size >> 1);
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codec_buffer = wm8750_dac_buffer(s->wm, block_size >> 1);
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@ -399,7 +381,7 @@ static void musicpal_audio_write(void *opaque, target_phys_addr_t offset,
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case MP_AUDIO_TX_START_LO:
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case MP_AUDIO_TX_START_LO:
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s->phys_buf = (s->phys_buf & 0xFFFF0000) | (value & 0xFFFF);
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s->phys_buf = (s->phys_buf & 0xFFFF0000) | (value & 0xFFFF);
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s->target_buffer = target2host_addr(s->phys_buf);
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s->target_buffer = s->phys_buf;
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s->play_pos = 0;
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s->play_pos = 0;
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s->last_free = 0;
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s->last_free = 0;
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break;
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break;
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@ -410,7 +392,7 @@ static void musicpal_audio_write(void *opaque, target_phys_addr_t offset,
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case MP_AUDIO_TX_START_HI:
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case MP_AUDIO_TX_START_HI:
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s->phys_buf = (s->phys_buf & 0xFFFF) | (value << 16);
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s->phys_buf = (s->phys_buf & 0xFFFF) | (value << 16);
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s->target_buffer = target2host_addr(s->phys_buf);
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s->target_buffer = s->phys_buf;
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s->play_pos = 0;
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s->play_pos = 0;
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s->last_free = 0;
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s->last_free = 0;
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break;
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break;
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@ -555,13 +537,33 @@ typedef struct mv88w8618_eth_state {
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uint32_t icr;
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uint32_t icr;
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uint32_t imr;
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uint32_t imr;
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int vlan_header;
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int vlan_header;
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mv88w8618_tx_desc *tx_queue[2];
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uint32_t tx_queue[2];
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mv88w8618_rx_desc *rx_queue[4];
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uint32_t rx_queue[4];
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mv88w8618_rx_desc *frx_queue[4];
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uint32_t frx_queue[4];
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mv88w8618_rx_desc *cur_rx[4];
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uint32_t cur_rx[4];
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VLANClientState *vc;
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VLANClientState *vc;
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} mv88w8618_eth_state;
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} mv88w8618_eth_state;
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static void eth_rx_desc_put(uint32_t addr, mv88w8618_rx_desc *desc)
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{
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cpu_to_le32s(&desc->cmdstat);
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cpu_to_le16s(&desc->bytes);
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cpu_to_le16s(&desc->buffer_size);
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cpu_to_le32s(&desc->buffer);
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cpu_to_le32s(&desc->next);
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cpu_physical_memory_write(addr, (void *)desc, sizeof(*desc));
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}
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static void eth_rx_desc_get(uint32_t addr, mv88w8618_rx_desc *desc)
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{
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cpu_physical_memory_read(addr, (void *)desc, sizeof(*desc));
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le32_to_cpus(&desc->cmdstat);
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le16_to_cpus(&desc->bytes);
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le16_to_cpus(&desc->buffer_size);
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le32_to_cpus(&desc->buffer);
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le32_to_cpus(&desc->next);
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}
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static int eth_can_receive(void *opaque)
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static int eth_can_receive(void *opaque)
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{
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{
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return 1;
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return 1;
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@ -570,47 +572,76 @@ static int eth_can_receive(void *opaque)
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static void eth_receive(void *opaque, const uint8_t *buf, int size)
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static void eth_receive(void *opaque, const uint8_t *buf, int size)
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{
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{
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mv88w8618_eth_state *s = opaque;
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mv88w8618_eth_state *s = opaque;
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mv88w8618_rx_desc *desc;
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uint32_t desc_addr;
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mv88w8618_rx_desc desc;
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int i;
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int i;
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for (i = 0; i < 4; i++) {
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for (i = 0; i < 4; i++) {
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desc = s->cur_rx[i];
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desc_addr = s->cur_rx[i];
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if (!desc)
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if (!desc_addr)
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continue;
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continue;
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do {
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do {
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if (le32_to_cpu(desc->cmdstat) & MP_ETH_RX_OWN &&
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eth_rx_desc_get(desc_addr, &desc);
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le16_to_cpu(desc->buffer_size) >= size) {
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if ((desc.cmdstat & MP_ETH_RX_OWN) && desc.buffer_size >= size) {
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memcpy(target2host_addr(le32_to_cpu(desc->buffer) +
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cpu_physical_memory_write(desc.buffer + s->vlan_header,
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s->vlan_header),
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buf, size);
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buf, size);
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desc->bytes = cpu_to_le16(size + s->vlan_header);
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desc.bytes = size + s->vlan_header;
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desc->cmdstat &= cpu_to_le32(~MP_ETH_RX_OWN);
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desc.cmdstat &= ~MP_ETH_RX_OWN;
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s->cur_rx[i] = target2host_addr(le32_to_cpu(desc->next));
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s->cur_rx[i] = desc.next;
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s->icr |= MP_ETH_IRQ_RX;
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s->icr |= MP_ETH_IRQ_RX;
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if (s->icr & s->imr)
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if (s->icr & s->imr)
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qemu_irq_raise(s->irq);
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qemu_irq_raise(s->irq);
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eth_rx_desc_put(desc_addr, &desc);
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return;
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return;
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}
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}
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desc = target2host_addr(le32_to_cpu(desc->next));
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desc_addr = desc.next;
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} while (desc != s->rx_queue[i]);
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} while (desc_addr != s->rx_queue[i]);
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}
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}
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}
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}
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static void eth_tx_desc_put(uint32_t addr, mv88w8618_tx_desc *desc)
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{
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cpu_to_le32s(&desc->cmdstat);
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cpu_to_le16s(&desc->res);
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cpu_to_le16s(&desc->bytes);
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cpu_to_le32s(&desc->buffer);
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cpu_to_le32s(&desc->next);
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cpu_physical_memory_write(addr, (void *)desc, sizeof(*desc));
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}
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static void eth_tx_desc_get(uint32_t addr, mv88w8618_tx_desc *desc)
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{
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cpu_physical_memory_read(addr, (void *)desc, sizeof(*desc));
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le32_to_cpus(&desc->cmdstat);
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le16_to_cpus(&desc->res);
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le16_to_cpus(&desc->bytes);
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le32_to_cpus(&desc->buffer);
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le32_to_cpus(&desc->next);
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}
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static void eth_send(mv88w8618_eth_state *s, int queue_index)
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static void eth_send(mv88w8618_eth_state *s, int queue_index)
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{
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{
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mv88w8618_tx_desc *desc = s->tx_queue[queue_index];
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uint32_t desc_addr = s->tx_queue[queue_index];
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mv88w8618_tx_desc desc;
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uint8_t buf[2048];
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int len;
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do {
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do {
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if (le32_to_cpu(desc->cmdstat) & MP_ETH_TX_OWN) {
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eth_tx_desc_get(desc_addr, &desc);
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qemu_send_packet(s->vc,
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if (desc.cmdstat & MP_ETH_TX_OWN) {
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target2host_addr(le32_to_cpu(desc->buffer)),
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len = desc.bytes;
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le16_to_cpu(desc->bytes));
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if (len < 2048) {
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desc->cmdstat &= cpu_to_le32(~MP_ETH_TX_OWN);
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cpu_physical_memory_read(desc.buffer, buf, len);
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s->icr |= 1 << (MP_ETH_IRQ_TXLO_BIT - queue_index);
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qemu_send_packet(s->vc, buf, len);
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}
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}
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desc = target2host_addr(le32_to_cpu(desc->next));
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desc.cmdstat &= ~MP_ETH_TX_OWN;
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} while (desc != s->tx_queue[queue_index]);
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s->icr |= 1 << (MP_ETH_IRQ_TXLO_BIT - queue_index);
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eth_tx_desc_put(desc_addr, &desc);
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}
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desc_addr = desc.next;
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} while (desc_addr != s->tx_queue[queue_index]);
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}
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}
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static uint32_t mv88w8618_eth_read(void *opaque, target_phys_addr_t offset)
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static uint32_t mv88w8618_eth_read(void *opaque, target_phys_addr_t offset)
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@ -641,13 +672,13 @@ static uint32_t mv88w8618_eth_read(void *opaque, target_phys_addr_t offset)
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return s->imr;
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return s->imr;
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case MP_ETH_FRDP0 ... MP_ETH_FRDP3:
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case MP_ETH_FRDP0 ... MP_ETH_FRDP3:
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return host2target_addr(s->frx_queue[(offset - MP_ETH_FRDP0)/4]);
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return s->frx_queue[(offset - MP_ETH_FRDP0)/4];
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case MP_ETH_CRDP0 ... MP_ETH_CRDP3:
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case MP_ETH_CRDP0 ... MP_ETH_CRDP3:
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return host2target_addr(s->rx_queue[(offset - MP_ETH_CRDP0)/4]);
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return s->rx_queue[(offset - MP_ETH_CRDP0)/4];
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case MP_ETH_CTDP0 ... MP_ETH_CTDP3:
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case MP_ETH_CTDP0 ... MP_ETH_CTDP3:
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return host2target_addr(s->tx_queue[(offset - MP_ETH_CTDP0)/4]);
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return s->tx_queue[(offset - MP_ETH_CTDP0)/4];
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default:
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default:
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return 0;
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return 0;
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@ -688,16 +719,16 @@ static void mv88w8618_eth_write(void *opaque, target_phys_addr_t offset,
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break;
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break;
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case MP_ETH_FRDP0 ... MP_ETH_FRDP3:
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case MP_ETH_FRDP0 ... MP_ETH_FRDP3:
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s->frx_queue[(offset - MP_ETH_FRDP0)/4] = target2host_addr(value);
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s->frx_queue[(offset - MP_ETH_FRDP0)/4] = value;
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break;
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break;
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case MP_ETH_CRDP0 ... MP_ETH_CRDP3:
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case MP_ETH_CRDP0 ... MP_ETH_CRDP3:
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s->rx_queue[(offset - MP_ETH_CRDP0)/4] =
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s->rx_queue[(offset - MP_ETH_CRDP0)/4] =
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s->cur_rx[(offset - MP_ETH_CRDP0)/4] = target2host_addr(value);
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s->cur_rx[(offset - MP_ETH_CRDP0)/4] = value;
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break;
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break;
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case MP_ETH_CTDP0 ... MP_ETH_CTDP3:
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case MP_ETH_CTDP0 ... MP_ETH_CTDP3:
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s->tx_queue[(offset - MP_ETH_CTDP0)/4] = target2host_addr(value);
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s->tx_queue[(offset - MP_ETH_CTDP0)/4] = value;
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break;
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break;
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}
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}
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}
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}
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