target/mips: Move tlb_helper.c to tcg/sysemu/

Move tlb_helper.c to the tcg/sysemu/ subdir, along with
the following 3 declarations to tcg-internal.h:
- cpu_mips_tlb_flush()
- cpu_mips_translate_address()
- r4k_invalidate_tlb()

Simplify tlb_helper.c #ifdef'ry because files in tcg/sysemu/
are only build when sysemu mode is configured.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-22-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-04-13 11:46:18 +02:00
parent c284201702
commit 920b48cc14
5 changed files with 6 additions and 9 deletions

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@ -164,16 +164,12 @@ void r4k_helper_tlbp(CPUMIPSState *env);
void r4k_helper_tlbr(CPUMIPSState *env);
void r4k_helper_tlbinv(CPUMIPSState *env);
void r4k_helper_tlbinvf(CPUMIPSState *env);
void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
vaddr addr, unsigned size,
MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type, uintptr_t retaddr);
extern const VMStateDescription vmstate_mips_cpu;
#endif /* !CONFIG_USER_ONLY */
@ -423,7 +419,6 @@ static inline void compute_hflags(CPUMIPSState *env)
}
}
void cpu_mips_tlb_flush(CPUMIPSState *env);
void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);

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@ -31,7 +31,6 @@ mips_tcg_ss.add(files(
'msa_translate.c',
'op_helper.c',
'rel6_translate.c',
'tlb_helper.c',
'translate.c',
'translate_addr_const.c',
'txx9_translate.c',

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@ -1,4 +1,5 @@
mips_softmmu_ss.add(files(
'cp0_helper.c',
'mips-semi.c',
'tlb_helper.c',
))

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@ -25,8 +25,6 @@
#include "exec/log.h"
#include "hw/mips/cpudevs.h"
#if !defined(CONFIG_USER_ONLY)
/* no MMU emulation */
int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
target_ulong address, MMUAccessType access_type)
@ -1072,4 +1070,3 @@ void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
}
}
}
#endif /* !CONFIG_USER_ONLY */

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@ -24,8 +24,13 @@ void mmu_init(CPUMIPSState *env, const mips_def_t *def);
void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
uint32_t cpu_mips_get_random(CPUMIPSState *env);
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type, uintptr_t retaddr);
void cpu_mips_tlb_flush(CPUMIPSState *env);
#endif /* !CONFIG_USER_ONLY */
#endif