target/mips: Move tlb_helper.c to tcg/sysemu/
Move tlb_helper.c to the tcg/sysemu/ subdir, along with the following 3 declarations to tcg-internal.h: - cpu_mips_tlb_flush() - cpu_mips_translate_address() - r4k_invalidate_tlb() Simplify tlb_helper.c #ifdef'ry because files in tcg/sysemu/ are only build when sysemu mode is configured. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-22-f4bug@amsat.org>
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@ -164,16 +164,12 @@ void r4k_helper_tlbp(CPUMIPSState *env);
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void r4k_helper_tlbr(CPUMIPSState *env);
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void r4k_helper_tlbinv(CPUMIPSState *env);
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void r4k_helper_tlbinvf(CPUMIPSState *env);
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void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
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void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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vaddr addr, unsigned size,
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MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
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MMUAccessType access_type, uintptr_t retaddr);
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extern const VMStateDescription vmstate_mips_cpu;
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#endif /* !CONFIG_USER_ONLY */
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@ -423,7 +419,6 @@ static inline void compute_hflags(CPUMIPSState *env)
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}
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}
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void cpu_mips_tlb_flush(CPUMIPSState *env);
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void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
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void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
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void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
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@ -31,7 +31,6 @@ mips_tcg_ss.add(files(
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'msa_translate.c',
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'op_helper.c',
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'rel6_translate.c',
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'tlb_helper.c',
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'translate.c',
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'translate_addr_const.c',
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'txx9_translate.c',
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@ -1,4 +1,5 @@
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mips_softmmu_ss.add(files(
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'cp0_helper.c',
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'mips-semi.c',
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'tlb_helper.c',
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))
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@ -25,8 +25,6 @@
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#include "exec/log.h"
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#include "hw/mips/cpudevs.h"
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#if !defined(CONFIG_USER_ONLY)
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/* no MMU emulation */
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int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
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target_ulong address, MMUAccessType access_type)
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@ -1072,4 +1070,3 @@ void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
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}
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}
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}
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#endif /* !CONFIG_USER_ONLY */
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@ -24,8 +24,13 @@ void mmu_init(CPUMIPSState *env, const mips_def_t *def);
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void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
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void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
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uint32_t cpu_mips_get_random(CPUMIPSState *env);
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hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
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MMUAccessType access_type, uintptr_t retaddr);
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void cpu_mips_tlb_flush(CPUMIPSState *env);
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#endif /* !CONFIG_USER_ONLY */
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#endif
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