target/cris: Let cris_mmu_translate() use MMUAccessType access_type

All callers of cris_mmu_translate() provide a MMUAccessType
type. Let the prototype use it as argument, as it is stricter
than an integer. We can remove the documentation as enum
names are self explicit.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <20210128003223.3561108-3-f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Philippe Mathieu-Daudé 2021-01-28 01:32:23 +01:00 committed by Edgar E. Iglesias
parent c0ff662fab
commit 91ab6d4696
2 changed files with 13 additions and 13 deletions

View File

@ -129,10 +129,10 @@ static void dump_tlb(CPUCRISState *env, int mmu)
} }
#endif #endif
/* rw 0 = read, 1 = write, 2 = exec. */
static int cris_mmu_translate_page(struct cris_mmu_result *res, static int cris_mmu_translate_page(struct cris_mmu_result *res,
CPUCRISState *env, uint32_t vaddr, CPUCRISState *env, uint32_t vaddr,
int rw, int usermode, int debug) MMUAccessType access_type,
int usermode, int debug)
{ {
unsigned int vpage; unsigned int vpage;
unsigned int idx; unsigned int idx;
@ -151,7 +151,7 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
r_cfg = env->sregs[SFR_RW_MM_CFG]; r_cfg = env->sregs[SFR_RW_MM_CFG];
pid = env->pregs[PR_PID] & 0xff; pid = env->pregs[PR_PID] & 0xff;
switch (rw) { switch (access_type) {
case MMU_INST_FETCH: case MMU_INST_FETCH:
rwcause = CRIS_MMU_ERR_EXEC; rwcause = CRIS_MMU_ERR_EXEC;
mmu = 0; mmu = 0;
@ -219,13 +219,13 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
vaddr, lo, env->pc)); vaddr, lo, env->pc));
match = 0; match = 0;
res->bf_vec = vect_base + 2; res->bf_vec = vect_base + 2;
} else if (rw == MMU_DATA_STORE && cfg_w && !tlb_w) { } else if (access_type == MMU_DATA_STORE && cfg_w && !tlb_w) {
D(printf("tlb: write protected %x lo=%x pc=%x\n", D(printf("tlb: write protected %x lo=%x pc=%x\n",
vaddr, lo, env->pc)); vaddr, lo, env->pc));
match = 0; match = 0;
/* write accesses never go through the I mmu. */ /* write accesses never go through the I mmu. */
res->bf_vec = vect_base + 3; res->bf_vec = vect_base + 3;
} else if (rw == MMU_INST_FETCH && cfg_x && !tlb_x) { } else if (access_type == MMU_INST_FETCH && cfg_x && !tlb_x) {
D(printf("tlb: exec protected %x lo=%x pc=%x\n", D(printf("tlb: exec protected %x lo=%x pc=%x\n",
vaddr, lo, env->pc)); vaddr, lo, env->pc));
match = 0; match = 0;
@ -272,9 +272,9 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
D(printf("refill vaddr=%x pc=%x\n", vaddr, env->pc)); D(printf("refill vaddr=%x pc=%x\n", vaddr, env->pc));
} }
D(printf("%s rw=%d mtch=%d pc=%x va=%x vpn=%x tlbvpn=%x pfn=%x pid=%x" D(printf("%s access=%u mtch=%d pc=%x va=%x vpn=%x tlbvpn=%x pfn=%x pid=%x"
" %x cause=%x sel=%x sp=%x %x %x\n", " %x cause=%x sel=%x sp=%x %x %x\n",
__func__, rw, match, env->pc, __func__, access_type, match, env->pc,
vaddr, vpage, vaddr, vpage,
tlb_vpn, tlb_pfn, tlb_pid, tlb_vpn, tlb_pfn, tlb_pid,
pid, pid,
@ -319,8 +319,8 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
} }
int cris_mmu_translate(struct cris_mmu_result *res, int cris_mmu_translate(struct cris_mmu_result *res,
CPUCRISState *env, uint32_t vaddr, CPUCRISState *env, uint32_t vaddr,
int rw, int mmu_idx, int debug) MMUAccessType access_type, int mmu_idx, int debug)
{ {
int seg; int seg;
int miss = 0; int miss = 0;
@ -329,7 +329,7 @@ int cris_mmu_translate(struct cris_mmu_result *res,
old_srs = env->pregs[PR_SRS]; old_srs = env->pregs[PR_SRS];
env->pregs[PR_SRS] = rw == MMU_INST_FETCH ? 1 : 2; env->pregs[PR_SRS] = access_type == MMU_INST_FETCH ? 1 : 2;
if (!cris_mmu_enabled(env->sregs[SFR_RW_GC_CFG])) { if (!cris_mmu_enabled(env->sregs[SFR_RW_GC_CFG])) {
res->phy = vaddr; res->phy = vaddr;
@ -346,7 +346,7 @@ int cris_mmu_translate(struct cris_mmu_result *res,
res->phy = base | (0x0fffffff & vaddr); res->phy = base | (0x0fffffff & vaddr);
res->prot = PAGE_BITS; res->prot = PAGE_BITS;
} else { } else {
miss = cris_mmu_translate_page(res, env, vaddr, rw, miss = cris_mmu_translate_page(res, env, vaddr, access_type,
is_user, debug); is_user, debug);
} }
done: done:

View File

@ -17,6 +17,6 @@ void cris_mmu_init(CPUCRISState *env);
void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid); void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid);
int cris_mmu_translate(struct cris_mmu_result *res, int cris_mmu_translate(struct cris_mmu_result *res,
CPUCRISState *env, uint32_t vaddr, CPUCRISState *env, uint32_t vaddr,
int rw, int mmu_idx, int debug); MMUAccessType access_type, int mmu_idx, int debug);
#endif #endif