target/openrisc: Set PC to cpu state on FPU exception

Store the PC to ensure the correct value can be read in the exception
handler.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Stafford Horne 2023-02-14 18:41:29 +09:00
parent 08f021de3a
commit 9156ca76cb

View File

@ -20,8 +20,8 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "cpu.h" #include "cpu.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h" #include "exec/helper-proto.h"
#include "exception.h"
#include "fpu/softfloat.h" #include "fpu/softfloat.h"
static int ieee_ex_to_openrisc(int fexcp) static int ieee_ex_to_openrisc(int fexcp)
@ -45,6 +45,15 @@ static int ieee_ex_to_openrisc(int fexcp)
return ret; return ret;
} }
static G_NORETURN
void do_fpe(CPUOpenRISCState *env, uintptr_t pc)
{
CPUState *cs = env_cpu(env);
cs->exception_index = EXCP_FPE;
cpu_loop_exit_restore(cs, pc);
}
void HELPER(update_fpcsr)(CPUOpenRISCState *env) void HELPER(update_fpcsr)(CPUOpenRISCState *env)
{ {
int tmp = get_float_exception_flags(&env->fp_status); int tmp = get_float_exception_flags(&env->fp_status);
@ -55,7 +64,7 @@ void HELPER(update_fpcsr)(CPUOpenRISCState *env)
if (tmp) { if (tmp) {
env->fpcsr |= tmp; env->fpcsr |= tmp;
if (env->fpcsr & FPCSR_FPEE) { if (env->fpcsr & FPCSR_FPEE) {
helper_exception(env, EXCP_FPE); do_fpe(env, GETPC());
} }
} }
} }