tcg: Allocate indirect_base temporaries in a different order
Since we've not got liveness analysis for indirect bases, placing them at the end of the call-saved registers makes it more likely that it'll stay live. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
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43
tcg/tcg.c
43
tcg/tcg.c
@ -318,6 +318,8 @@ static const TCGHelperInfo all_helpers[] = {
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#include "exec/helper-tcg.h"
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};
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static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)];
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void tcg_context_init(TCGContext *s)
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{
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int op, total_args, n, i;
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@ -360,6 +362,21 @@ void tcg_context_init(TCGContext *s)
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}
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tcg_target_init(s);
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/* Reverse the order of the saved registers, assuming they're all at
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the start of tcg_target_reg_alloc_order. */
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for (n = 0; n < ARRAY_SIZE(tcg_target_reg_alloc_order); ++n) {
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int r = tcg_target_reg_alloc_order[n];
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if (tcg_regset_test_reg(tcg_target_call_clobber_regs, r)) {
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break;
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}
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}
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for (i = 0; i < n; ++i) {
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indirect_reg_alloc_order[i] = tcg_target_reg_alloc_order[n - 1 - i];
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}
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for (; i < ARRAY_SIZE(tcg_target_reg_alloc_order); ++i) {
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indirect_reg_alloc_order[i] = tcg_target_reg_alloc_order[i];
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}
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}
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void tcg_prologue_init(TCGContext *s)
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@ -1696,24 +1713,26 @@ static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
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/* Allocate a register belonging to reg1 & ~reg2 */
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static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet desired_regs,
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TCGRegSet allocated_regs)
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TCGRegSet allocated_regs, bool rev)
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{
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int i;
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int i, n = ARRAY_SIZE(tcg_target_reg_alloc_order);
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const int *order;
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TCGReg reg;
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TCGRegSet reg_ct;
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tcg_regset_andnot(reg_ct, desired_regs, allocated_regs);
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order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order;
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/* first try free registers */
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for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
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reg = tcg_target_reg_alloc_order[i];
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for(i = 0; i < n; i++) {
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reg = order[i];
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if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == NULL)
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return reg;
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}
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/* XXX: do better spill choice */
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for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
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reg = tcg_target_reg_alloc_order[i];
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for(i = 0; i < n; i++) {
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reg = order[i];
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if (tcg_regset_test_reg(reg_ct, reg)) {
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tcg_reg_free(s, reg, allocated_regs);
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return reg;
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@ -1734,12 +1753,12 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
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case TEMP_VAL_REG:
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return;
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case TEMP_VAL_CONST:
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reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
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reg = tcg_reg_alloc(s, desired_regs, allocated_regs, ts->indirect_base);
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tcg_out_movi(s, ts->type, reg, ts->val);
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ts->mem_coherent = 0;
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break;
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case TEMP_VAL_MEM:
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reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
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reg = tcg_reg_alloc(s, desired_regs, allocated_regs, ts->indirect_base);
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if (ts->indirect_reg) {
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tcg_regset_set_reg(allocated_regs, reg);
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temp_load(s, ts->mem_base,
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@ -1976,7 +1995,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
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input one. */
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tcg_regset_set_reg(allocated_regs, ts->reg);
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ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype],
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allocated_regs);
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allocated_regs, ots->indirect_base);
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}
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tcg_out_mov(s, otype, ots->reg, ts->reg);
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}
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@ -2061,7 +2080,8 @@ static void tcg_reg_alloc_op(TCGContext *s,
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allocate_in_reg:
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/* allocate a new register matching the constraint
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and move the temporary register into it */
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reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
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reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs,
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ts->indirect_base);
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tcg_out_mov(s, ts->type, reg, ts->reg);
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}
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new_args[i] = reg;
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@ -2110,7 +2130,8 @@ static void tcg_reg_alloc_op(TCGContext *s,
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tcg_regset_test_reg(arg_ct->u.regs, reg)) {
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goto oarg_end;
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}
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reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
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reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs,
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ts->indirect_base);
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}
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tcg_regset_set_reg(allocated_regs, reg);
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/* if a fixed register is used, then a move will be done afterwards */
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