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disas: Add RISC-V support

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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <caa478c8987d6042434bb9582017cdf0ea192208.1545246859.git.alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Alistair Francis 2018-12-19 19:20:09 +00:00 committed by Richard Henderson
parent 464e447a0c
commit 91468b2703
1 changed files with 8 additions and 2 deletions
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10
disas.c
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@ -522,8 +522,14 @@ void disas(FILE *out, void *code, unsigned long size)
# ifdef _ARCH_PPC64 # ifdef _ARCH_PPC64
s.info.cap_mode = CS_MODE_64; s.info.cap_mode = CS_MODE_64;
# endif # endif
#elif defined(__riscv__) #elif defined(__riscv) && defined(CONFIG_RISCV_DIS)
print_insn = print_insn_riscv; #if defined(_ILP32) || (__riscv_xlen == 32)
print_insn = print_insn_riscv32;
#elif defined(_LP64)
print_insn = print_insn_riscv64;
#else
#error unsupported RISC-V ABI
#endif
#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS) #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
print_insn = print_insn_arm_a64; print_insn = print_insn_arm_a64;
s.info.cap_arch = CS_ARCH_ARM64; s.info.cap_arch = CS_ARCH_ARM64;