target/sh4: Convert to 3-phase reset
Convert the sh4 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-id: 20221124115023.2437291-17-peter.maydell@linaro.org
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@ -34,7 +34,7 @@ OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU)
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/**
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* SuperHCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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* @parent_phases: The parent class' reset phase handlers.
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* @pvr: Processor Version Register
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* @prr: Processor Revision Register
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* @cvr: Cache Version Register
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@ -47,7 +47,7 @@ struct SuperHCPUClass {
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/*< public >*/
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DeviceRealize parent_realize;
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DeviceReset parent_reset;
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ResettablePhases parent_phases;
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uint32_t pvr;
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uint32_t prr;
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@ -87,14 +87,16 @@ static bool superh_cpu_has_work(CPUState *cs)
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void superh_cpu_reset(DeviceState *dev)
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static void superh_cpu_reset_hold(Object *obj)
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{
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CPUState *s = CPU(dev);
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CPUState *s = CPU(obj);
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SuperHCPU *cpu = SUPERH_CPU(s);
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SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(cpu);
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CPUSH4State *env = &cpu->env;
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scc->parent_reset(dev);
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if (scc->parent_phases.hold) {
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scc->parent_phases.hold(obj);
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}
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memset(env, 0, offsetof(CPUSH4State, end_reset_fields));
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@ -274,11 +276,13 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
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DeviceClass *dc = DEVICE_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
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ResettableClass *rc = RESETTABLE_CLASS(oc);
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device_class_set_parent_realize(dc, superh_cpu_realizefn,
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&scc->parent_realize);
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device_class_set_parent_reset(dc, superh_cpu_reset, &scc->parent_reset);
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resettable_class_set_parent_phases(rc, NULL, superh_cpu_reset_hold, NULL,
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&scc->parent_phases);
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cc->class_by_name = superh_cpu_class_by_name;
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cc->has_work = superh_cpu_has_work;
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