mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

apb: QOMify sabre PCI host bridge

Browse Source 
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
This commit is contained in:
Mark Cave-Ayland 2018-01-21 08:59:45 +00:00
parent 5560c58a50
commit 8fb28035aa
2 changed files with 14 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hw/pci-host/apb.c
View File

@ -407,7 +407,7 @@ static void sabre_realize(DeviceState *dev, Error **errp)
&s->pci_ioport,
0, 32, TYPE_PCI_BUS);
pci_create_simple(phb->bus, 0, "pbm-pci");
pci_create_simple(phb->bus, 0, TYPE_SABRE_PCI_DEVICE);
/* IOMMU */
memory_region_add_subregion_overlap(&s->apb_config, 0x200,
@ -498,9 +498,9 @@ static void sabre_pci_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo sabre_pci_info = {
.name = "pbm-pci",
.name = TYPE_SABRE_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.instance_size = sizeof(SabrePCIState),
.class_init = sabre_pci_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },

14
include/hw/pci-host/apb.h
View File

@ -14,9 +14,13 @@
#define OBIO_MSE_IRQ 0x2a
#define OBIO_SER_IRQ 0x2b
#define TYPE_APB "pbm"
#define APB_DEVICE(obj) \
OBJECT_CHECK(APBState, (obj), TYPE_APB)
typedef struct SabrePCIState {
PCIDevice parent_obj;
} SabrePCIState;
#define TYPE_SABRE_PCI_DEVICE "sabre-pci"
#define SABRE_PCI_DEVICE(obj) \
OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE)
typedef struct APBState {
PCIHostState parent_obj;
@ -41,4 +45,8 @@ typedef struct APBState {
unsigned int nr_resets;
} APBState;
#define TYPE_APB "apb"
#define APB_DEVICE(obj) \
OBJECT_CHECK(APBState, (obj), TYPE_APB)
#endif