target-alpha: Convert opcode 0x1A to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -2735,6 +2735,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
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goto invalid_opc;
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}
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break;
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case 0x19:
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/* HW_MFPR (PALcode) */
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#ifndef CONFIG_USER_ONLY
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@ -2743,14 +2744,12 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
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#else
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goto invalid_opc;
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#endif
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case 0x1A:
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/* JMP, JSR, RET, JSR_COROUTINE. These only differ by the branch
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prediction stack action, which of course we don't implement. */
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if (rb != 31) {
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tcg_gen_andi_i64(cpu_pc, cpu_ir[rb], ~3);
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} else {
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tcg_gen_movi_i64(cpu_pc, 0);
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}
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vb = load_gpr(ctx, rb);
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tcg_gen_andi_i64(cpu_pc, vb, ~3);
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if (ra != 31) {
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tcg_gen_movi_i64(cpu_ir[ra], ctx->pc);
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}
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