audio streaming from usb devices
I have streaming audio devices working within qemu-kvm. This is a port of the changes to qemu. Streaming audio generates a series of isochronous requests that are repetitive and time sensitive. The URBs need to be submitted in consecutive USB frames and responses need to be handled in a timely manner. Summary of the changes for isochronous requests: 1. The initial 'valid' value is increased to 32. It needs to be higher than its current value of 10 since the host adds a 10 frame delay to the scheduling of the first request; if valid is set to 10 the first isochronous request times out and qemu cancels it. 32 was chosen as a nice round number, and it is used in the path where a TD-async pairing already exists. 2. The token field in the TD is *not* unique for isochronous requests, so it is not a good choice for finding a matching async request. The buffer (where to write the guest data) is unique, so use that value instead. 3. TD's for isochronous request need to be completed in the async completion handler so that data is pushed to the guest as soon as it is available. The uhci code currently attempts to process complete isochronous TDs the next time the UHCI frame with the request is processed. The results in lost data since the async requests will have long since timed out based on the valid parameter. Increasing the valid value is not acceptable as it introduces a 1+ second delay in the data getting pushed to the guest. 4. The frame timer needs to be run on 1 msec intervals. Currently, the expire time for the processing the next frame is computed after the processing of each frame. This regularly causes the scheduling of frames to shift in time. When this happens the periodic scheduling of the requests is broken and the subsequent request is seen as a new request by the host resulting in a 10 msec delay (first isochronous request is scheduled for 10 frames from when the URB is submitted). [ For what's worth a small change is needed to the guest driver to have more outstanding URBs (at least 4 URBs with 5 packets per URB).] Signed-off-by: David Ahern <daahern@cisco.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -112,6 +112,7 @@ typedef struct UHCIAsync {
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uint32_t td;
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uint32_t token;
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int8_t valid;
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uint8_t isoc;
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uint8_t done;
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uint8_t buffer[2048];
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} UHCIAsync;
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@ -131,6 +132,7 @@ typedef struct UHCIState {
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uint32_t fl_base_addr; /* frame list base address */
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uint8_t sof_timing;
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uint8_t status2; /* bit 0 and 1 are used to generate UHCI_STS_USBINT */
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int64_t expire_time;
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QEMUTimer *frame_timer;
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UHCIPort ports[NB_PORTS];
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@ -164,6 +166,7 @@ static UHCIAsync *uhci_async_alloc(UHCIState *s)
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async->td = 0;
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async->token = 0;
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async->done = 0;
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async->isoc = 0;
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async->next = NULL;
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return async;
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@ -762,13 +765,25 @@ static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td, uint32_t *in
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{
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UHCIAsync *async;
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int len = 0, max_len;
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uint8_t pid;
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uint8_t pid, isoc;
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uint32_t token;
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/* Is active ? */
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if (!(td->ctrl & TD_CTRL_ACTIVE))
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return 1;
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async = uhci_async_find_td(s, addr, td->token);
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/* token field is not unique for isochronous requests,
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* so use the destination buffer
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*/
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if (td->ctrl & TD_CTRL_IOS) {
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token = td->buffer;
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isoc = 1;
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} else {
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token = td->token;
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isoc = 0;
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}
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async = uhci_async_find_td(s, addr, token);
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if (async) {
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/* Already submitted */
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async->valid = 32;
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@ -785,9 +800,13 @@ static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td, uint32_t *in
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if (!async)
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return 1;
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async->valid = 10;
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/* valid needs to be large enough to handle 10 frame delay
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* for initial isochronous requests
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*/
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async->valid = 32;
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async->td = addr;
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async->token = td->token;
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async->token = token;
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async->isoc = isoc;
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max_len = ((td->token >> 21) + 1) & 0x7ff;
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pid = td->token & 0xff;
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@ -841,9 +860,31 @@ static void uhci_async_complete(USBPacket *packet, void *opaque)
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DPRINTF("uhci: async complete. td 0x%x token 0x%x\n", async->td, async->token);
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async->done = 1;
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if (async->isoc) {
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UHCI_TD td;
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uint32_t link = async->td;
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uint32_t int_mask = 0, val;
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int len;
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cpu_physical_memory_read(link & ~0xf, (uint8_t *) &td, sizeof(td));
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le32_to_cpus(&td.link);
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le32_to_cpus(&td.ctrl);
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le32_to_cpus(&td.token);
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le32_to_cpus(&td.buffer);
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uhci_process_frame(s);
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uhci_async_unlink(s, async);
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len = uhci_complete_td(s, &td, async, &int_mask);
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s->pending_int_mask |= int_mask;
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/* update the status bits of the TD */
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val = cpu_to_le32(td.ctrl);
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cpu_physical_memory_write((link & ~0xf) + 4,
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(const uint8_t *)&val, sizeof(val));
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uhci_async_free(s, async);
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} else {
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async->done = 1;
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uhci_process_frame(s);
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}
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}
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static int is_valid(uint32_t link)
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@ -1005,13 +1046,15 @@ static void uhci_process_frame(UHCIState *s)
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/* go to the next entry */
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}
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s->pending_int_mask = int_mask;
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s->pending_int_mask |= int_mask;
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}
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static void uhci_frame_timer(void *opaque)
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{
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UHCIState *s = opaque;
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int64_t expire_time;
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/* prepare the timer for the next frame */
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s->expire_time += (get_ticks_per_sec() / FRAME_TIMER_FREQ);
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if (!(s->cmd & UHCI_CMD_RS)) {
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/* Full stop */
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@ -1029,6 +1072,7 @@ static void uhci_frame_timer(void *opaque)
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s->status |= UHCI_STS_USBINT;
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uhci_update_irq(s);
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}
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s->pending_int_mask = 0;
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/* Start new frame */
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s->frnum = (s->frnum + 1) & 0x7ff;
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@ -1041,10 +1085,7 @@ static void uhci_frame_timer(void *opaque)
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uhci_async_validate_end(s);
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/* prepare the timer for the next frame */
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expire_time = qemu_get_clock(vm_clock) +
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(get_ticks_per_sec() / FRAME_TIMER_FREQ);
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qemu_mod_timer(s->frame_timer, expire_time);
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qemu_mod_timer(s->frame_timer, s->expire_time);
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}
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static void uhci_map(PCIDevice *pci_dev, int region_num,
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@ -1078,6 +1119,8 @@ static int usb_uhci_common_initfn(UHCIState *s)
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usb_register_port(&s->bus, &s->ports[i].port, s, i, uhci_attach);
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}
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s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s);
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s->expire_time = qemu_get_clock(vm_clock) +
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(get_ticks_per_sec() / FRAME_TIMER_FREQ);
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s->num_ports_vmstate = NB_PORTS;
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qemu_register_reset(uhci_reset, s);
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