target/arm: Clear high SVE elements in handle_vec_simd_wshli
AdvSIMD instructions are supposed to zero bits beyond 128. Affects SSHLL, USHLL, SSHLL2, USHLL2. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240717060903.205098-15-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -10756,6 +10756,7 @@ static void handle_vec_simd_wshli(DisasContext *s, bool is_q, bool is_u,
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tcg_gen_shli_i64(tcg_rd, tcg_rd, shift);
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write_vec_element(s, tcg_rd, rd, i, size + 1);
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}
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clear_vec_high(s, true, rd);
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}
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/* SHRN/RSHRN - Shift right with narrowing (and potential rounding) */
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