target-arm queue:
* contrib/elf2dmp: Support Windows Server 2022 * hw/char/cadence_uart: Fix guards on invalid BRGR/BDIV settings * target/arm: Add Neoverse-N1 IMPDEF registers * hw/usb/imx: Fix out of bounds access in imx_usbphy_read() * docs/system/arm/cpu-features.rst: Fix formatting * target/arm: Don't advertise aarch64-pauth.xml to gdb -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmQZrwQZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gmFD/9Ib/G7f21IQkhi0d0MoJeQ 529QbzHbXH272OvO2zFdev98o6EVbbeGzGqgaa0lv6OASwvNUIFVJAwZUX6Bb756 dJ9k5aS2249SGQ8AzM65bCL4HxSVFan5+t9P890SyQk3zIzzQtSVjci/K2P2cFx1 bKzbCZys/qjZgncPaPeuc9irkmAKlqc9UwqgUV3xvhBAfq1eFHk/bVIhcTVxNwUy quCYOt1GwtsOKn+nUcKclOcmBb7diCu6iFCGlO7XF9Rjaa+egW3OhUnGqUFROsdu j4drjeQT8gWY92m8PlnsZb0YUeefAwD7iVZGIAEp3G+9GEXdOvotrQVKtMLMZkq0 /YInUjYAFu1w7DqhelvSYGVoVioP13HxsFWpmKNYNSJIHtS7QCfmHfUBPQnWjHD5 XUO/K7vbsp69yi/rDDoHvQ3sqxJUuiF1Wuyj+hRK1JXRhLkRL+tBE7urlqqoJ1wH 0vL6oNj5GdvNJssIkb7yXx72irgAUu8XTC7bEvGCVfaylmei3SsS35qQmGePzO/z ok7WePQ/tM/FJ8JLVTXur9YsG7EqMROdszQRE4Yla3NE6BOr7HCCj7ZdCfy5SXL4 IlZ69UELcYghcfIDRrRLXDSdfs98voRxIRDHy0rz64hUHlLBOnfqw/dcHvZBAB09 CV7QPcDOR87jY228DT4EzA== =D7pq -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20230321' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * contrib/elf2dmp: Support Windows Server 2022 * hw/char/cadence_uart: Fix guards on invalid BRGR/BDIV settings * target/arm: Add Neoverse-N1 IMPDEF registers * hw/usb/imx: Fix out of bounds access in imx_usbphy_read() * docs/system/arm/cpu-features.rst: Fix formatting * target/arm: Don't advertise aarch64-pauth.xml to gdb # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmQZrwQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gmFD/9Ib/G7f21IQkhi0d0MoJeQ # 529QbzHbXH272OvO2zFdev98o6EVbbeGzGqgaa0lv6OASwvNUIFVJAwZUX6Bb756 # dJ9k5aS2249SGQ8AzM65bCL4HxSVFan5+t9P890SyQk3zIzzQtSVjci/K2P2cFx1 # bKzbCZys/qjZgncPaPeuc9irkmAKlqc9UwqgUV3xvhBAfq1eFHk/bVIhcTVxNwUy # quCYOt1GwtsOKn+nUcKclOcmBb7diCu6iFCGlO7XF9Rjaa+egW3OhUnGqUFROsdu # j4drjeQT8gWY92m8PlnsZb0YUeefAwD7iVZGIAEp3G+9GEXdOvotrQVKtMLMZkq0 # /YInUjYAFu1w7DqhelvSYGVoVioP13HxsFWpmKNYNSJIHtS7QCfmHfUBPQnWjHD5 # XUO/K7vbsp69yi/rDDoHvQ3sqxJUuiF1Wuyj+hRK1JXRhLkRL+tBE7urlqqoJ1wH # 0vL6oNj5GdvNJssIkb7yXx72irgAUu8XTC7bEvGCVfaylmei3SsS35qQmGePzO/z # ok7WePQ/tM/FJ8JLVTXur9YsG7EqMROdszQRE4Yla3NE6BOr7HCCj7ZdCfy5SXL4 # IlZ69UELcYghcfIDRrRLXDSdfs98voRxIRDHy0rz64hUHlLBOnfqw/dcHvZBAB09 # CV7QPcDOR87jY228DT4EzA== # =D7pq # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Mar 2023 13:20:04 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20230321' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Don't advertise aarch64-pauth.xml to gdb docs/system/arm/cpu-features.rst: Fix formatting hw/usb/imx: Fix out of bounds access in imx_usbphy_read() contrib/elf2dmp: add PE name check and Windows Server 2022 support contrib/elf2dmp: move PE dir search to pe_get_data_dir_entry contrib/elf2dmp: fix code style hw/char/cadence_uart: Fix guards on invalid BRGR/BDIV settings target/arm: Add Neoverse-N1 registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
8de6e6e12e
@ -11,6 +11,7 @@
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static struct pa_block *pa_space_find_block(struct pa_space *ps, uint64_t pa)
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{
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size_t i;
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for (i = 0; i < ps->block_nr; i++) {
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if (ps->block[i].paddr <= pa &&
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pa <= ps->block[i].paddr + ps->block[i].size) {
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@ -17,6 +17,7 @@
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#define SYM_URL_BASE "https://msdl.microsoft.com/download/symbols/"
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#define PDB_NAME "ntkrnlmp.pdb"
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#define PE_NAME "ntoskrnl.exe"
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#define INITIAL_MXCSR 0x1f80
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@ -282,14 +283,16 @@ static int fill_header(WinDumpHeader64 *hdr, struct pa_space *ps,
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};
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for (i = 0; i < ps->block_nr; i++) {
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h.PhysicalMemoryBlock.NumberOfPages += ps->block[i].size / ELF2DMP_PAGE_SIZE;
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h.PhysicalMemoryBlock.NumberOfPages +=
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ps->block[i].size / ELF2DMP_PAGE_SIZE;
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h.PhysicalMemoryBlock.Run[i] = (WinDumpPhyMemRun64) {
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.BasePage = ps->block[i].paddr / ELF2DMP_PAGE_SIZE,
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.PageCount = ps->block[i].size / ELF2DMP_PAGE_SIZE,
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};
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}
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h.RequiredDumpSpace += h.PhysicalMemoryBlock.NumberOfPages << ELF2DMP_PAGE_BITS;
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h.RequiredDumpSpace +=
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h.PhysicalMemoryBlock.NumberOfPages << ELF2DMP_PAGE_BITS;
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*hdr = h;
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@ -299,7 +302,8 @@ static int fill_header(WinDumpHeader64 *hdr, struct pa_space *ps,
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static int fill_context(KDDEBUGGER_DATA64 *kdbg,
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struct va_space *vs, QEMU_Elf *qe)
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{
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int i;
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int i;
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for (i = 0; i < qe->state_nr; i++) {
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uint64_t Prcb;
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uint64_t Context;
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@ -330,6 +334,45 @@ static int fill_context(KDDEBUGGER_DATA64 *kdbg,
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return 0;
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}
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static int pe_get_data_dir_entry(uint64_t base, void *start_addr, int idx,
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void *entry, size_t size, struct va_space *vs)
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{
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const char e_magic[2] = "MZ";
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const char Signature[4] = "PE\0\0";
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IMAGE_DOS_HEADER *dos_hdr = start_addr;
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IMAGE_NT_HEADERS64 nt_hdrs;
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IMAGE_FILE_HEADER *file_hdr = &nt_hdrs.FileHeader;
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IMAGE_OPTIONAL_HEADER64 *opt_hdr = &nt_hdrs.OptionalHeader;
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IMAGE_DATA_DIRECTORY *data_dir = nt_hdrs.OptionalHeader.DataDirectory;
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QEMU_BUILD_BUG_ON(sizeof(*dos_hdr) >= ELF2DMP_PAGE_SIZE);
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if (memcmp(&dos_hdr->e_magic, e_magic, sizeof(e_magic))) {
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return 1;
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}
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if (va_space_rw(vs, base + dos_hdr->e_lfanew,
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&nt_hdrs, sizeof(nt_hdrs), 0)) {
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return 1;
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}
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if (memcmp(&nt_hdrs.Signature, Signature, sizeof(Signature)) ||
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file_hdr->Machine != 0x8664 || opt_hdr->Magic != 0x020b) {
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return 1;
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}
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if (va_space_rw(vs,
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base + data_dir[idx].VirtualAddress,
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entry, size, 0)) {
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return 1;
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}
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printf("Data directory entry #%d: RVA = 0x%08"PRIx32"\n", idx,
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(uint32_t)data_dir[idx].VirtualAddress);
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return 0;
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}
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static int write_dump(struct pa_space *ps,
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WinDumpHeader64 *hdr, const char *name)
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{
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@ -363,45 +406,38 @@ static int write_dump(struct pa_space *ps,
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return fclose(dmp_file);
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}
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static bool pe_check_export_name(uint64_t base, void *start_addr,
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struct va_space *vs)
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{
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IMAGE_EXPORT_DIRECTORY export_dir;
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const char *pe_name;
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if (pe_get_data_dir_entry(base, start_addr, IMAGE_FILE_EXPORT_DIRECTORY,
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&export_dir, sizeof(export_dir), vs)) {
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return false;
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}
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pe_name = va_space_resolve(vs, base + export_dir.Name);
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if (!pe_name) {
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return false;
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}
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return !strcmp(pe_name, PE_NAME);
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}
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static int pe_get_pdb_symstore_hash(uint64_t base, void *start_addr,
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char *hash, struct va_space *vs)
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{
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const char e_magic[2] = "MZ";
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const char Signature[4] = "PE\0\0";
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const char sign_rsds[4] = "RSDS";
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IMAGE_DOS_HEADER *dos_hdr = start_addr;
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IMAGE_NT_HEADERS64 nt_hdrs;
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IMAGE_FILE_HEADER *file_hdr = &nt_hdrs.FileHeader;
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IMAGE_OPTIONAL_HEADER64 *opt_hdr = &nt_hdrs.OptionalHeader;
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IMAGE_DATA_DIRECTORY *data_dir = nt_hdrs.OptionalHeader.DataDirectory;
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IMAGE_DEBUG_DIRECTORY debug_dir;
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OMFSignatureRSDS rsds;
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char *pdb_name;
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size_t pdb_name_sz;
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size_t i;
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QEMU_BUILD_BUG_ON(sizeof(*dos_hdr) >= ELF2DMP_PAGE_SIZE);
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if (memcmp(&dos_hdr->e_magic, e_magic, sizeof(e_magic))) {
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return 1;
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}
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if (va_space_rw(vs, base + dos_hdr->e_lfanew,
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&nt_hdrs, sizeof(nt_hdrs), 0)) {
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return 1;
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}
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if (memcmp(&nt_hdrs.Signature, Signature, sizeof(Signature)) ||
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file_hdr->Machine != 0x8664 || opt_hdr->Magic != 0x020b) {
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return 1;
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}
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printf("Debug Directory RVA = 0x%08"PRIx32"\n",
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(uint32_t)data_dir[IMAGE_FILE_DEBUG_DIRECTORY].VirtualAddress);
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if (va_space_rw(vs,
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base + data_dir[IMAGE_FILE_DEBUG_DIRECTORY].VirtualAddress,
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&debug_dir, sizeof(debug_dir), 0)) {
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if (pe_get_data_dir_entry(base, start_addr, IMAGE_FILE_DEBUG_DIRECTORY,
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&debug_dir, sizeof(debug_dir), vs)) {
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eprintf("Failed to get Debug Directory\n");
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return 1;
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}
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@ -473,6 +509,7 @@ int main(int argc, char *argv[])
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uint64_t KdDebuggerDataBlock;
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KDDEBUGGER_DATA64 *kdbg;
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uint64_t KdVersionBlock;
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bool kernel_found = false;
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if (argc != 3) {
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eprintf("usage:\n\t%s elf_file dmp_file\n", argv[0]);
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@ -520,11 +557,14 @@ int main(int argc, char *argv[])
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}
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if (*(uint16_t *)nt_start_addr == 0x5a4d) { /* MZ */
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break;
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if (pe_check_export_name(KernBase, nt_start_addr, &vs)) {
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kernel_found = true;
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break;
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}
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}
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}
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if (!nt_start_addr) {
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if (!kernel_found) {
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eprintf("Failed to find NT kernel image\n");
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err = 1;
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goto out_ps;
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@ -33,75 +33,90 @@ typedef struct IMAGE_DOS_HEADER {
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} __attribute__ ((packed)) IMAGE_DOS_HEADER;
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typedef struct IMAGE_FILE_HEADER {
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uint16_t Machine;
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uint16_t NumberOfSections;
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uint32_t TimeDateStamp;
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uint32_t PointerToSymbolTable;
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uint32_t NumberOfSymbols;
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uint16_t SizeOfOptionalHeader;
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uint16_t Characteristics;
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uint16_t Machine;
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uint16_t NumberOfSections;
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uint32_t TimeDateStamp;
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uint32_t PointerToSymbolTable;
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uint32_t NumberOfSymbols;
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uint16_t SizeOfOptionalHeader;
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uint16_t Characteristics;
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} __attribute__ ((packed)) IMAGE_FILE_HEADER;
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typedef struct IMAGE_DATA_DIRECTORY {
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uint32_t VirtualAddress;
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uint32_t Size;
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uint32_t VirtualAddress;
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uint32_t Size;
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} __attribute__ ((packed)) IMAGE_DATA_DIRECTORY;
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#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16
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typedef struct IMAGE_OPTIONAL_HEADER64 {
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uint16_t Magic; /* 0x20b */
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uint8_t MajorLinkerVersion;
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uint8_t MinorLinkerVersion;
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uint32_t SizeOfCode;
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uint32_t SizeOfInitializedData;
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uint32_t SizeOfUninitializedData;
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uint32_t AddressOfEntryPoint;
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uint32_t BaseOfCode;
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uint64_t ImageBase;
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uint32_t SectionAlignment;
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uint32_t FileAlignment;
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uint16_t MajorOperatingSystemVersion;
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uint16_t MinorOperatingSystemVersion;
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uint16_t MajorImageVersion;
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uint16_t MinorImageVersion;
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uint16_t MajorSubsystemVersion;
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uint16_t MinorSubsystemVersion;
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uint32_t Win32VersionValue;
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uint32_t SizeOfImage;
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uint32_t SizeOfHeaders;
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uint32_t CheckSum;
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uint16_t Subsystem;
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uint16_t DllCharacteristics;
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uint64_t SizeOfStackReserve;
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uint64_t SizeOfStackCommit;
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uint64_t SizeOfHeapReserve;
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uint64_t SizeOfHeapCommit;
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uint32_t LoaderFlags;
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uint32_t NumberOfRvaAndSizes;
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IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES];
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uint16_t Magic; /* 0x20b */
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uint8_t MajorLinkerVersion;
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uint8_t MinorLinkerVersion;
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uint32_t SizeOfCode;
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uint32_t SizeOfInitializedData;
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uint32_t SizeOfUninitializedData;
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uint32_t AddressOfEntryPoint;
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uint32_t BaseOfCode;
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uint64_t ImageBase;
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uint32_t SectionAlignment;
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uint32_t FileAlignment;
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uint16_t MajorOperatingSystemVersion;
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uint16_t MinorOperatingSystemVersion;
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uint16_t MajorImageVersion;
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uint16_t MinorImageVersion;
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uint16_t MajorSubsystemVersion;
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uint16_t MinorSubsystemVersion;
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uint32_t Win32VersionValue;
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uint32_t SizeOfImage;
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uint32_t SizeOfHeaders;
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uint32_t CheckSum;
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uint16_t Subsystem;
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uint16_t DllCharacteristics;
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uint64_t SizeOfStackReserve;
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uint64_t SizeOfStackCommit;
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uint64_t SizeOfHeapReserve;
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uint64_t SizeOfHeapCommit;
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uint32_t LoaderFlags;
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uint32_t NumberOfRvaAndSizes;
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IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES];
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} __attribute__ ((packed)) IMAGE_OPTIONAL_HEADER64;
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typedef struct IMAGE_NT_HEADERS64 {
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uint32_t Signature;
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IMAGE_FILE_HEADER FileHeader;
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IMAGE_OPTIONAL_HEADER64 OptionalHeader;
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uint32_t Signature;
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IMAGE_FILE_HEADER FileHeader;
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IMAGE_OPTIONAL_HEADER64 OptionalHeader;
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} __attribute__ ((packed)) IMAGE_NT_HEADERS64;
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typedef struct IMAGE_EXPORT_DIRECTORY {
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uint32_t Characteristics;
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uint32_t TimeDateStamp;
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uint16_t MajorVersion;
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uint16_t MinorVersion;
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uint32_t Name;
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uint32_t Base;
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uint32_t NumberOfFunctions;
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uint32_t NumberOfNames;
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uint32_t AddressOfFunctions;
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uint32_t AddressOfNames;
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uint32_t AddressOfNameOrdinals;
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} __attribute__ ((packed)) IMAGE_EXPORT_DIRECTORY;
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typedef struct IMAGE_DEBUG_DIRECTORY {
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uint32_t Characteristics;
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uint32_t TimeDateStamp;
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uint16_t MajorVersion;
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uint16_t MinorVersion;
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uint32_t Type;
|
||||
uint32_t SizeOfData;
|
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uint32_t AddressOfRawData;
|
||||
uint32_t PointerToRawData;
|
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uint32_t Characteristics;
|
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uint32_t TimeDateStamp;
|
||||
uint16_t MajorVersion;
|
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uint16_t MinorVersion;
|
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uint32_t Type;
|
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uint32_t SizeOfData;
|
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uint32_t AddressOfRawData;
|
||||
uint32_t PointerToRawData;
|
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} __attribute__ ((packed)) IMAGE_DEBUG_DIRECTORY;
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||||
|
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#define IMAGE_DEBUG_TYPE_CODEVIEW 2
|
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#endif
|
||||
|
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#define IMAGE_FILE_EXPORT_DIRECTORY 0
|
||||
#define IMAGE_FILE_DEBUG_DIRECTORY 6
|
||||
|
||||
typedef struct guid_t {
|
||||
|
||||
@ -177,39 +177,32 @@ are named with the prefix "kvm-". KVM VCPU features may be probed,
|
||||
enabled, and disabled in the same way as other CPU features. Below is
|
||||
the list of KVM VCPU features and their descriptions.
|
||||
|
||||
kvm-no-adjvtime By default kvm-no-adjvtime is disabled. This
|
||||
means that by default the virtual time
|
||||
adjustment is enabled (vtime is not *not*
|
||||
adjusted).
|
||||
``kvm-no-adjvtime``
|
||||
By default kvm-no-adjvtime is disabled. This means that by default
|
||||
the virtual time adjustment is enabled (vtime is not *not* adjusted).
|
||||
|
||||
When virtual time adjustment is enabled each
|
||||
time the VM transitions back to running state
|
||||
the VCPU's virtual counter is updated to ensure
|
||||
stopped time is not counted. This avoids time
|
||||
jumps surprising guest OSes and applications,
|
||||
as long as they use the virtual counter for
|
||||
timekeeping. However it has the side effect of
|
||||
the virtual and physical counters diverging.
|
||||
All timekeeping based on the virtual counter
|
||||
will appear to lag behind any timekeeping that
|
||||
does not subtract VM stopped time. The guest
|
||||
may resynchronize its virtual counter with
|
||||
other time sources as needed.
|
||||
When virtual time adjustment is enabled each time the VM transitions
|
||||
back to running state the VCPU's virtual counter is updated to
|
||||
ensure stopped time is not counted. This avoids time jumps
|
||||
surprising guest OSes and applications, as long as they use the
|
||||
virtual counter for timekeeping. However it has the side effect of
|
||||
the virtual and physical counters diverging. All timekeeping based
|
||||
on the virtual counter will appear to lag behind any timekeeping
|
||||
that does not subtract VM stopped time. The guest may resynchronize
|
||||
its virtual counter with other time sources as needed.
|
||||
|
||||
Enable kvm-no-adjvtime to disable virtual time
|
||||
adjustment, also restoring the legacy (pre-5.0)
|
||||
behavior.
|
||||
Enable kvm-no-adjvtime to disable virtual time adjustment, also
|
||||
restoring the legacy (pre-5.0) behavior.
|
||||
|
||||
kvm-steal-time Since v5.2, kvm-steal-time is enabled by
|
||||
default when KVM is enabled, the feature is
|
||||
supported, and the guest is 64-bit.
|
||||
``kvm-steal-time``
|
||||
Since v5.2, kvm-steal-time is enabled by default when KVM is
|
||||
enabled, the feature is supported, and the guest is 64-bit.
|
||||
|
||||
When kvm-steal-time is enabled a 64-bit guest
|
||||
can account for time its CPUs were not running
|
||||
due to the host not scheduling the corresponding
|
||||
VCPU threads. The accounting statistics may
|
||||
influence the guest scheduler behavior and/or be
|
||||
exposed to the guest userspace.
|
||||
When kvm-steal-time is enabled a 64-bit guest can account for time
|
||||
its CPUs were not running due to the host not scheduling the
|
||||
corresponding VCPU threads. The accounting statistics may influence
|
||||
the guest scheduler behavior and/or be exposed to the guest
|
||||
userspace.
|
||||
|
||||
TCG VCPU Features
|
||||
=================
|
||||
@ -217,16 +210,15 @@ TCG VCPU Features
|
||||
TCG VCPU features are CPU features that are specific to TCG.
|
||||
Below is the list of TCG VCPU features and their descriptions.
|
||||
|
||||
pauth-impdef When ``FEAT_Pauth`` is enabled, either the
|
||||
*impdef* (Implementation Defined) algorithm
|
||||
is enabled or the *architected* QARMA algorithm
|
||||
is enabled. By default the impdef algorithm
|
||||
is disabled, and QARMA is enabled.
|
||||
``pauth-impdef``
|
||||
When ``FEAT_Pauth`` is enabled, either the *impdef* (Implementation
|
||||
Defined) algorithm is enabled or the *architected* QARMA algorithm
|
||||
is enabled. By default the impdef algorithm is disabled, and QARMA
|
||||
is enabled.
|
||||
|
||||
The architected QARMA algorithm has good
|
||||
cryptographic properties, but can be quite slow
|
||||
to emulate. The impdef algorithm used by QEMU
|
||||
is non-cryptographic but significantly faster.
|
||||
The architected QARMA algorithm has good cryptographic properties,
|
||||
but can be quite slow to emulate. The impdef algorithm used by QEMU
|
||||
is non-cryptographic but significantly faster.
|
||||
|
||||
SVE CPU Properties
|
||||
==================
|
||||
|
||||
@ -450,13 +450,15 @@ static MemTxResult uart_write(void *opaque, hwaddr offset,
|
||||
}
|
||||
break;
|
||||
case R_BRGR: /* Baud rate generator */
|
||||
value &= 0xffff;
|
||||
if (value >= 0x01) {
|
||||
s->r[offset] = value & 0xFFFF;
|
||||
s->r[offset] = value;
|
||||
}
|
||||
break;
|
||||
case R_BDIV: /* Baud rate divider */
|
||||
value &= 0xff;
|
||||
if (value >= 0x04) {
|
||||
s->r[offset] = value & 0xFF;
|
||||
s->r[offset] = value;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
|
||||
@ -13,6 +13,7 @@
|
||||
#include "qemu/osdep.h"
|
||||
#include "hw/usb/imx-usb-phy.h"
|
||||
#include "migration/vmstate.h"
|
||||
#include "qemu/log.h"
|
||||
#include "qemu/module.h"
|
||||
|
||||
static const VMStateDescription vmstate_imx_usbphy = {
|
||||
@ -90,7 +91,15 @@ static uint64_t imx_usbphy_read(void *opaque, hwaddr offset, unsigned size)
|
||||
value = s->usbphy[index - 3];
|
||||
break;
|
||||
default:
|
||||
value = s->usbphy[index];
|
||||
if (index < USBPHY_MAX) {
|
||||
value = s->usbphy[index];
|
||||
} else {
|
||||
qemu_log_mask(LOG_GUEST_ERROR,
|
||||
"%s: Read from non-existing USB PHY register 0x%"
|
||||
HWADDR_PRIx "\n",
|
||||
__func__, offset);
|
||||
value = 0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
return (uint64_t)value;
|
||||
@ -168,7 +177,13 @@ static void imx_usbphy_write(void *opaque, hwaddr offset, uint64_t value,
|
||||
s->usbphy[index - 3] ^= value;
|
||||
break;
|
||||
default:
|
||||
/* Other registers are read-only */
|
||||
/* Other registers are read-only or do not exist */
|
||||
qemu_log_mask(LOG_GUEST_ERROR,
|
||||
"%s: Write to %s USB PHY register 0x%"
|
||||
HWADDR_PRIx "\n",
|
||||
__func__,
|
||||
index >= USBPHY_MAX ? "non-existing" : "read-only",
|
||||
offset);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -21,6 +21,7 @@
|
||||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "cpu.h"
|
||||
#include "cpregs.h"
|
||||
#include "qemu/module.h"
|
||||
#include "sysemu/kvm.h"
|
||||
#include "sysemu/hvf.h"
|
||||
@ -1027,6 +1028,72 @@ static void aarch64_a64fx_initfn(Object *obj)
|
||||
/* TODO: Add A64FX specific HPC extension registers */
|
||||
}
|
||||
|
||||
static const ARMCPRegInfo neoverse_n1_cp_reginfo[] = {
|
||||
{ .name = "ATCR_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 7, .opc2 = 0,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "ATCR_EL2", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 4, .crn = 15, .crm = 7, .opc2 = 0,
|
||||
.access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "ATCR_EL3", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 6, .crn = 15, .crm = 7, .opc2 = 0,
|
||||
.access = PL3_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "ATCR_EL12", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 5, .crn = 15, .crm = 7, .opc2 = 0,
|
||||
.access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "AVTCR_EL2", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 4, .crn = 15, .crm = 7, .opc2 = 1,
|
||||
.access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUACTLR_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 1, .opc2 = 0,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUACTLR2_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 1, .opc2 = 1,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUACTLR3_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 1, .opc2 = 2,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
/*
|
||||
* Report CPUCFR_EL1.SCU as 1, as we do not implement the DSU
|
||||
* (and in particular its system registers).
|
||||
*/
|
||||
{ .name = "CPUCFR_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 0, .opc2 = 0,
|
||||
.access = PL1_R, .type = ARM_CP_CONST, .resetvalue = 4 },
|
||||
{ .name = "CPUECTLR_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 1, .opc2 = 4,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0x961563010 },
|
||||
{ .name = "CPUPCR_EL3", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 6, .crn = 15, .crm = 8, .opc2 = 1,
|
||||
.access = PL3_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUPMR_EL3", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 6, .crn = 15, .crm = 8, .opc2 = 3,
|
||||
.access = PL3_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUPOR_EL3", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 6, .crn = 15, .crm = 8, .opc2 = 2,
|
||||
.access = PL3_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUPSELR_EL3", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 6, .crn = 15, .crm = 8, .opc2 = 0,
|
||||
.access = PL3_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "CPUPWRCTLR_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 2, .opc2 = 7,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "ERXPFGCDN_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 2, .opc2 = 2,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "ERXPFGCTL_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 2, .opc2 = 1,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
{ .name = "ERXPFGF_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 2, .opc2 = 0,
|
||||
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
|
||||
};
|
||||
|
||||
static void define_neoverse_n1_cp_reginfo(ARMCPU *cpu)
|
||||
{
|
||||
define_arm_cp_regs(cpu, neoverse_n1_cp_reginfo);
|
||||
}
|
||||
|
||||
static void aarch64_neoverse_n1_initfn(Object *obj)
|
||||
{
|
||||
ARMCPU *cpu = ARM_CPU(obj);
|
||||
@ -1094,6 +1161,8 @@ static void aarch64_neoverse_n1_initfn(Object *obj)
|
||||
|
||||
/* From D5.1 AArch64 PMU register summary */
|
||||
cpu->isar.reset_pmcr_el0 = 0x410c3000;
|
||||
|
||||
define_neoverse_n1_cp_reginfo(cpu);
|
||||
}
|
||||
|
||||
static void aarch64_host_initfn(Object *obj)
|
||||
|
||||
@ -520,11 +520,18 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
|
||||
aarch64_gdb_set_fpu_reg,
|
||||
34, "aarch64-fpu.xml", 0);
|
||||
}
|
||||
#if 0
|
||||
/*
|
||||
* GDB versions 9 through 12 have a bug which means they will
|
||||
* crash if they see this XML from QEMU; disable it for the 8.0
|
||||
* release, pending a better solution.
|
||||
*/
|
||||
if (isar_feature_aa64_pauth(&cpu->isar)) {
|
||||
gdb_register_coprocessor(cs, aarch64_gdb_get_pauth_reg,
|
||||
aarch64_gdb_set_pauth_reg,
|
||||
4, "aarch64-pauth.xml", 0);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
} else {
|
||||
if (arm_feature(env, ARM_FEATURE_NEON)) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user