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hw/loongarch: Refine system dram memory region

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For system dram memory region, it is not necessary to use numa node
information. There is only low memory region and high memory region.

Remove numa node information for ddr memory region here, it can reduce
memory region number on LoongArch virt machine.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240515093927.3453674-5-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
Bibo Mao 2024-05-15 17:39:25 +08:00 committed by Song Gao
parent 3cc451cbce
commit 8d96788cb1
1 changed files with 16 additions and 35 deletions
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51
hw/loongarch/virt.c
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@ -978,14 +978,10 @@ static void virt_init(MachineState *machine)
{ {
LoongArchCPU *lacpu; LoongArchCPU *lacpu;
const char *cpu_model = machine->cpu_type; const char *cpu_model = machine->cpu_type;
ram_addr_t offset = 0;
ram_addr_t ram_size = machine->ram_size;
uint64_t highram_size = 0, phyAddr = 0;
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
int nb_numa_nodes = machine->numa_state->num_nodes;
NodeInfo *numa_info = machine->numa_state->nodes;
int i; int i;
hwaddr base, size, ram_size = machine->ram_size;
const CPUArchIdList *possible_cpus; const CPUArchIdList *possible_cpus;
MachineClass *mc = MACHINE_GET_CLASS(machine); MachineClass *mc = MACHINE_GET_CLASS(machine);
CPUState *cpu; CPUState *cpu;
@ -1023,40 +1019,27 @@ static void virt_init(MachineState *machine)
fw_cfg_add_memory(machine); fw_cfg_add_memory(machine);
/* Node0 memory */ /* Node0 memory */
memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram", size = ram_size;
machine->ram, offset, VIRT_LOWMEM_SIZE); base = VIRT_LOWMEM_BASE;
memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem); if (size > VIRT_LOWMEM_SIZE) {
size = VIRT_LOWMEM_SIZE;
offset += VIRT_LOWMEM_SIZE;
if (nb_numa_nodes > 0) {
assert(numa_info[0].node_mem > VIRT_LOWMEM_SIZE);
highram_size = numa_info[0].node_mem - VIRT_LOWMEM_SIZE;
} else {
highram_size = ram_size - VIRT_LOWMEM_SIZE;
} }
phyAddr = VIRT_HIGHMEM_BASE;
memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
machine->ram, offset, highram_size);
memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
/* Node1 - Nodemax memory */ memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram",
offset += highram_size; machine->ram, base, size);
phyAddr += highram_size; memory_region_add_subregion(address_space_mem, base, &lvms->lowmem);
base += size;
for (i = 1; i < nb_numa_nodes; i++) { if (ram_size - size) {
MemoryRegion *nodemem = g_new(MemoryRegion, 1); base = VIRT_HIGHMEM_BASE;
g_autofree char *ramName = g_strdup_printf("loongarch.node%d.ram", i); memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram",
memory_region_init_alias(nodemem, NULL, ramName, machine->ram, machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size);
offset, numa_info[i].node_mem); memory_region_add_subregion(address_space_mem, base, &lvms->highmem);
memory_region_add_subregion(address_space_mem, phyAddr, nodemem); base += ram_size - size;
offset += numa_info[i].node_mem;
phyAddr += numa_info[i].node_mem;
} }
/* initialize device memory address space */ /* initialize device memory address space */
if (machine->ram_size < machine->maxram_size) { if (machine->ram_size < machine->maxram_size) {
ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
hwaddr device_mem_base;
if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
error_report("unsupported amount of memory slots: %"PRIu64, error_report("unsupported amount of memory slots: %"PRIu64,
@ -1070,9 +1053,7 @@ static void virt_init(MachineState *machine)
"%d bytes", TARGET_PAGE_SIZE); "%d bytes", TARGET_PAGE_SIZE);
exit(EXIT_FAILURE); exit(EXIT_FAILURE);
} }
/* device memory base is the top of high memory address. */ machine_memory_devices_init(machine, base, device_mem_size);
device_mem_base = ROUND_UP(VIRT_HIGHMEM_BASE + highram_size, 1 * GiB);
machine_memory_devices_init(machine, device_mem_base, device_mem_size);
} }
/* load the BIOS image. */ /* load the BIOS image. */