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iommu: add is_write as a parameter to the translate function of MemoryRegionIOMMUOps

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Add a bool variable is_write as a parameter to the translate function of
MemoryRegionIOMMUOps to indicate the operation of the access. It can be
used for correct fault reporting from within the callback.
Change the interface of related functions.

Signed-off-by: Le Tan <tamlokveer@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Le Tan 2014-08-16 13:55:37 +08:00 committed by Michael S. Tsirkin
parent 187de915e8
commit 8d7b8cb9c2
5 changed files with 8 additions and 5 deletions
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2
exec.c
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@ -373,7 +373,7 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
break; break;
} }
iotlb = mr->iommu_ops->translate(mr, addr); iotlb = mr->iommu_ops->translate(mr, addr, is_write);
addr = ((iotlb.translated_addr & ~iotlb.addr_mask) addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
| (addr & iotlb.addr_mask)); | (addr & iotlb.addr_mask));
len = MIN(len, (addr | iotlb.addr_mask) - addr + 1); len = MIN(len, (addr | iotlb.addr_mask) - addr + 1);

3
hw/alpha/typhoon.c
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@ -660,7 +660,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr addr,
/* Handle PCI-to-system address translation. */ /* Handle PCI-to-system address translation. */
/* TODO: A translation failure here ought to set PCI error codes on the /* TODO: A translation failure here ought to set PCI error codes on the
Pchip and generate a machine check interrupt. */ Pchip and generate a machine check interrupt. */
static IOMMUTLBEntry typhoon_translate_iommu(MemoryRegion *iommu, hwaddr addr) static IOMMUTLBEntry typhoon_translate_iommu(MemoryRegion *iommu, hwaddr addr,
bool is_write)
{ {
TyphoonPchip *pchip = container_of(iommu, TyphoonPchip, iommu); TyphoonPchip *pchip = container_of(iommu, TyphoonPchip, iommu);
IOMMUTLBEntry ret; IOMMUTLBEntry ret;

3
hw/pci-host/apb.c
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@ -204,7 +204,8 @@ static AddressSpace *pbm_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
return &is->iommu_as; return &is->iommu_as;
} }
static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr) static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr,
bool is_write)
{ {
IOMMUState *is = container_of(iommu, IOMMUState, iommu); IOMMUState *is = container_of(iommu, IOMMUState, iommu);
hwaddr baseaddr, offset; hwaddr baseaddr, offset;

3
hw/ppc/spapr_iommu.c
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@ -59,7 +59,8 @@ static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
return NULL; return NULL;
} }
static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr) static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr,
bool is_write)
{ {
sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu); sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
uint64_t tce; uint64_t tce;

2
include/exec/memory.h
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@ -129,7 +129,7 @@ typedef struct MemoryRegionIOMMUOps MemoryRegionIOMMUOps;
struct MemoryRegionIOMMUOps { struct MemoryRegionIOMMUOps {
/* Return a TLB entry that contains a given address. */ /* Return a TLB entry that contains a given address. */
IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr); IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, bool is_write);
}; };
typedef struct CoalescedMemoryRange CoalescedMemoryRange; typedef struct CoalescedMemoryRange CoalescedMemoryRange;