use AIO for DMA transfers - enabled DMA for CDROMs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2103 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
e84a4fedf7
commit
8ccad811e6
393
hw/ide.c
393
hw/ide.c
@ -26,6 +26,8 @@
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/* debug IDE devices */
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//#define DEBUG_IDE
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//#define DEBUG_IDE_ATAPI
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//#define DEBUG_AIO
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#define USE_DMA_CDROM
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/* Bits of HD_STATUS */
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#define ERR_STAT 0x01
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@ -368,10 +370,6 @@ typedef struct IDEState {
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#define UDIDETCR0 0x73
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#define UDIDETCR1 0x7B
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typedef int IDEDMAFunc(IDEState *s,
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target_phys_addr_t phys_addr,
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int transfer_size1);
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typedef struct BMDMAState {
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uint8_t cmd;
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uint8_t status;
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@ -379,8 +377,13 @@ typedef struct BMDMAState {
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struct PCIIDEState *pci_dev;
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/* current transfer state */
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uint32_t cur_addr;
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uint32_t cur_prd_last;
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uint32_t cur_prd_addr;
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uint32_t cur_prd_len;
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IDEState *ide_if;
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IDEDMAFunc *dma_cb;
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BlockDriverCompletionFunc *dma_cb;
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BlockDriverAIOCB *aiocb;
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} BMDMAState;
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typedef struct PCIIDEState {
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@ -390,7 +393,7 @@ typedef struct PCIIDEState {
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int type; /* see IDE_TYPE_xxx */
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} PCIIDEState;
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static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb);
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static void ide_dma_start(IDEState *s, BlockDriverCompletionFunc *dma_cb);
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static void padstr(char *str, const char *src, int len)
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{
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@ -513,10 +516,17 @@ static void ide_atapi_identify(IDEState *s)
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padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
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padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
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put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
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#ifdef USE_DMA_CDROM
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put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
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put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
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put_le16(p + 63, 7); /* mdma0-2 supported */
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put_le16(p + 64, 0x3f); /* PIO modes supported */
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#else
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put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
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put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
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put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
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put_le16(p + 64, 1); /* PIO modes */
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#endif
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put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
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put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
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put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
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@ -526,7 +536,9 @@ static void ide_atapi_identify(IDEState *s)
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put_le16(p + 72, 30); /* in ns */
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put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
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#ifdef USE_DMA_CDROM
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put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
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#endif
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memcpy(s->identify_data, p, sizeof(s->identify_data));
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s->identify_set = 1;
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}
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@ -659,54 +671,101 @@ static void ide_sector_read(IDEState *s)
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}
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}
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static int ide_read_dma_cb(IDEState *s,
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target_phys_addr_t phys_addr,
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int transfer_size1)
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/* return 0 if buffer completed */
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static int dma_buf_rw(BMDMAState *bm, int is_write)
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{
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int len, transfer_size, n;
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IDEState *s = bm->ide_if;
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struct {
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uint32_t addr;
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uint32_t size;
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} prd;
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int l, len;
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for(;;) {
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l = s->io_buffer_size - s->io_buffer_index;
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if (l <= 0)
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break;
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if (bm->cur_prd_len == 0) {
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/* end of table (with a fail safe of one page) */
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if (bm->cur_prd_last ||
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(bm->cur_addr - bm->addr) >= 4096)
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return 0;
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cpu_physical_memory_read(bm->cur_addr, (uint8_t *)&prd, 8);
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bm->cur_addr += 8;
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prd.addr = le32_to_cpu(prd.addr);
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prd.size = le32_to_cpu(prd.size);
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len = prd.size & 0xfffe;
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if (len == 0)
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len = 0x10000;
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bm->cur_prd_len = len;
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bm->cur_prd_addr = prd.addr;
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bm->cur_prd_last = (prd.size & 0x80000000);
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}
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if (l > bm->cur_prd_len)
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l = bm->cur_prd_len;
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if (l > 0) {
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if (is_write) {
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cpu_physical_memory_write(bm->cur_prd_addr,
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s->io_buffer + s->io_buffer_index, l);
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} else {
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cpu_physical_memory_read(bm->cur_prd_addr,
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s->io_buffer + s->io_buffer_index, l);
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}
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bm->cur_prd_addr += l;
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bm->cur_prd_len -= l;
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s->io_buffer_index += l;
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}
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}
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return 1;
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}
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/* XXX: handle errors */
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static void ide_read_dma_cb(void *opaque, int ret)
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{
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BMDMAState *bm = opaque;
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IDEState *s = bm->ide_if;
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int n;
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int64_t sector_num;
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transfer_size = transfer_size1;
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while (transfer_size > 0) {
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len = s->io_buffer_size - s->io_buffer_index;
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if (len <= 0) {
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/* transfert next data */
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n = s->nsector;
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if (n == 0)
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break;
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if (n > MAX_MULT_SECTORS)
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n = MAX_MULT_SECTORS;
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n = s->io_buffer_size >> 9;
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sector_num = ide_get_sector(s);
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bdrv_read(s->bs, sector_num, s->io_buffer, n);
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s->io_buffer_index = 0;
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s->io_buffer_size = n * 512;
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len = s->io_buffer_size;
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if (n > 0) {
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sector_num += n;
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ide_set_sector(s, sector_num);
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s->nsector -= n;
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if (dma_buf_rw(bm, 1) == 0)
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goto eot;
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}
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if (len > transfer_size)
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len = transfer_size;
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cpu_physical_memory_write(phys_addr,
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s->io_buffer + s->io_buffer_index, len);
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s->io_buffer_index += len;
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transfer_size -= len;
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phys_addr += len;
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}
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if (s->io_buffer_index >= s->io_buffer_size && s->nsector == 0) {
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/* end of transfer ? */
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if (s->nsector == 0) {
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s->status = READY_STAT | SEEK_STAT;
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ide_set_irq(s);
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#ifdef DEBUG_IDE_ATAPI
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printf("dma status=0x%x\n", s->status);
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#endif
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return 0;
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eot:
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bm->status &= ~BM_STATUS_DMAING;
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bm->status |= BM_STATUS_INT;
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bm->dma_cb = NULL;
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bm->ide_if = NULL;
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bm->aiocb = NULL;
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return;
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}
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return transfer_size1 - transfer_size;
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/* launch next transfer */
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n = s->nsector;
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if (n > MAX_MULT_SECTORS)
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n = MAX_MULT_SECTORS;
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s->io_buffer_index = 0;
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s->io_buffer_size = n * 512;
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#ifdef DEBUG_AIO
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printf("aio_read: sector_num=%lld n=%d\n", sector_num, n);
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#endif
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bm->aiocb = bdrv_aio_read(s->bs, sector_num, s->io_buffer, n,
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ide_read_dma_cb, bm);
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}
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static void ide_sector_read_dma(IDEState *s)
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{
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s->status = READY_STAT | SEEK_STAT | DRQ_STAT;
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s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
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s->io_buffer_index = 0;
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s->io_buffer_size = 0;
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ide_dma_start(s, ide_read_dma_cb);
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@ -761,71 +820,56 @@ static void ide_sector_write(IDEState *s)
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}
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}
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static int ide_write_dma_cb(IDEState *s,
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target_phys_addr_t phys_addr,
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int transfer_size1)
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/* XXX: handle errors */
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static void ide_write_dma_cb(void *opaque, int ret)
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{
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int len, transfer_size, n;
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BMDMAState *bm = opaque;
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IDEState *s = bm->ide_if;
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int n;
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int64_t sector_num;
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transfer_size = transfer_size1;
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for(;;) {
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len = s->io_buffer_size - s->io_buffer_index;
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if (len == 0) {
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n = s->io_buffer_size >> 9;
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sector_num = ide_get_sector(s);
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bdrv_write(s->bs, sector_num, s->io_buffer,
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s->io_buffer_size >> 9);
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if (n > 0) {
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sector_num += n;
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ide_set_sector(s, sector_num);
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s->nsector -= n;
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n = s->nsector;
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if (n == 0) {
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/* end of transfer */
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s->status = READY_STAT | SEEK_STAT;
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#ifdef TARGET_I386
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if (win2k_install_hack && ((++s->irq_count % 16) == 0)) {
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/* It seems there is a bug in the Windows 2000 installer
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HDD IDE driver which fills the disk with empty logs
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when the IDE write IRQ comes too early. This hack tries
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to correct that at the expense of slower write
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performances. Use this option _only_ to install Windows
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2000. You must disable it for normal use. */
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qemu_mod_timer(s->sector_write_timer,
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qemu_get_clock(vm_clock) + (ticks_per_sec / 1000));
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} else
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#endif
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ide_set_irq(s);
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return 0;
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}
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/* end of transfer ? */
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if (s->nsector == 0) {
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s->status = READY_STAT | SEEK_STAT;
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ide_set_irq(s);
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eot:
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bm->status &= ~BM_STATUS_DMAING;
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bm->status |= BM_STATUS_INT;
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bm->dma_cb = NULL;
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bm->ide_if = NULL;
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bm->aiocb = NULL;
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return;
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}
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/* launch next transfer */
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n = s->nsector;
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if (n > MAX_MULT_SECTORS)
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n = MAX_MULT_SECTORS;
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s->io_buffer_index = 0;
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s->io_buffer_size = n * 512;
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len = s->io_buffer_size;
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}
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if (transfer_size <= 0)
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break;
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if (len > transfer_size)
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len = transfer_size;
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cpu_physical_memory_read(phys_addr,
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s->io_buffer + s->io_buffer_index, len);
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s->io_buffer_index += len;
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transfer_size -= len;
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phys_addr += len;
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}
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return transfer_size1 - transfer_size;
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if (dma_buf_rw(bm, 0) == 0)
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goto eot;
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#ifdef DEBUG_AIO
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printf("aio_write: sector_num=%lld n=%d\n", sector_num, n);
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#endif
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bm->aiocb = bdrv_aio_write(s->bs, sector_num, s->io_buffer, n,
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ide_write_dma_cb, bm);
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}
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static void ide_sector_write_dma(IDEState *s)
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{
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int n;
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s->status = READY_STAT | SEEK_STAT | DRQ_STAT;
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n = s->nsector;
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if (n > MAX_MULT_SECTORS)
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n = MAX_MULT_SECTORS;
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s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
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s->io_buffer_index = 0;
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s->io_buffer_size = n * 512;
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s->io_buffer_size = 0;
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ide_dma_start(s, ide_write_dma_cb);
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}
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@ -882,14 +926,8 @@ static void lba_to_msf(uint8_t *buf, int lba)
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buf[2] = lba % 75;
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}
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static void cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf,
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int sector_size)
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static void cd_data_to_raw(uint8_t *buf, int lba)
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{
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switch(sector_size) {
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case 2048:
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bdrv_read(bs, (int64_t)lba << 2, buf, 4);
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break;
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case 2352:
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/* sync bytes */
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buf[0] = 0x00;
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memset(buf + 1, 0xff, 10);
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@ -900,10 +938,21 @@ static void cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf,
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buf[3] = 0x01; /* mode 1 data */
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buf += 4;
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/* data */
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bdrv_read(bs, (int64_t)lba << 2, buf, 4);
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buf += 2048;
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/* ECC */
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/* XXX: ECC not computed */
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memset(buf, 0, 288);
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}
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static void cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf,
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int sector_size)
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{
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switch(sector_size) {
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case 2048:
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bdrv_read(bs, (int64_t)lba << 2, buf, 4);
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break;
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case 2352:
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bdrv_read(bs, (int64_t)lba << 2, buf + 16, 4);
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cd_data_to_raw(buf, lba);
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break;
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default:
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break;
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@ -1013,46 +1062,58 @@ static void ide_atapi_cmd_read_pio(IDEState *s, int lba, int nb_sectors,
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}
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/* ATAPI DMA support */
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static int ide_atapi_cmd_read_dma_cb(IDEState *s,
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target_phys_addr_t phys_addr,
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int transfer_size1)
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{
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int len, transfer_size;
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transfer_size = transfer_size1;
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while (transfer_size > 0) {
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#ifdef DEBUG_IDE_ATAPI
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printf("transfer_size: %d phys_addr=%08x\n", transfer_size, phys_addr);
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#endif
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if (s->packet_transfer_size <= 0)
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break;
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len = s->cd_sector_size - s->io_buffer_index;
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if (len <= 0) {
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/* transfert next data */
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cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
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s->lba++;
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s->io_buffer_index = 0;
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len = s->cd_sector_size;
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/* XXX: handle read errors */
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static void ide_atapi_cmd_read_dma_cb(void *opaque, int ret)
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{
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BMDMAState *bm = opaque;
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IDEState *s = bm->ide_if;
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int data_offset, n;
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if (s->io_buffer_size > 0) {
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if (s->cd_sector_size == 2352) {
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n = 1;
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cd_data_to_raw(s->io_buffer, s->lba);
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} else {
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n = s->io_buffer_size >> 11;
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}
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if (len > transfer_size)
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len = transfer_size;
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cpu_physical_memory_write(phys_addr,
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s->io_buffer + s->io_buffer_index, len);
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s->packet_transfer_size -= len;
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s->io_buffer_index += len;
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transfer_size -= len;
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phys_addr += len;
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s->packet_transfer_size -= s->io_buffer_size;
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s->lba += n;
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if (dma_buf_rw(bm, 1) == 0)
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goto eot;
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}
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if (s->packet_transfer_size <= 0) {
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s->status = READY_STAT;
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s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
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ide_set_irq(s);
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#ifdef DEBUG_IDE_ATAPI
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printf("dma status=0x%x\n", s->status);
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#endif
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return 0;
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eot:
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bm->status &= ~BM_STATUS_DMAING;
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bm->status |= BM_STATUS_INT;
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bm->dma_cb = NULL;
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bm->ide_if = NULL;
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bm->aiocb = NULL;
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return;
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}
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return transfer_size1 - transfer_size;
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s->io_buffer_index = 0;
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if (s->cd_sector_size == 2352) {
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n = 1;
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s->io_buffer_size = s->cd_sector_size;
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data_offset = 16;
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} else {
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n = s->packet_transfer_size >> 11;
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if (n > (MAX_MULT_SECTORS / 4))
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n = (MAX_MULT_SECTORS / 4);
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s->io_buffer_size = n * 2048;
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data_offset = 0;
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}
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#ifdef DEBUG_AIO
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printf("aio_read_cd: lba=%u n=%d\n", s->lba, n);
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#endif
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bm->aiocb = bdrv_aio_read(s->bs, (int64_t)s->lba << 2,
|
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s->io_buffer + data_offset, n * 4,
|
||||
ide_atapi_cmd_read_dma_cb, bm);
|
||||
}
|
||||
|
||||
/* start a CD-CDROM read command with DMA */
|
||||
@ -1062,10 +1123,12 @@ static void ide_atapi_cmd_read_dma(IDEState *s, int lba, int nb_sectors,
|
||||
{
|
||||
s->lba = lba;
|
||||
s->packet_transfer_size = nb_sectors * sector_size;
|
||||
s->io_buffer_index = sector_size;
|
||||
s->io_buffer_index = 0;
|
||||
s->io_buffer_size = 0;
|
||||
s->cd_sector_size = sector_size;
|
||||
|
||||
s->status = READY_STAT | DRQ_STAT;
|
||||
/* XXX: check if BUSY_STAT should be set */
|
||||
s->status = READY_STAT | DRQ_STAT | BUSY_STAT;
|
||||
ide_dma_start(s, ide_atapi_cmd_read_dma_cb);
|
||||
}
|
||||
|
||||
@ -2103,59 +2166,19 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
|
||||
}
|
||||
}
|
||||
|
||||
/* XXX: full callback usage to prepare non blocking I/Os support -
|
||||
error handling */
|
||||
static void ide_dma_loop(BMDMAState *bm)
|
||||
{
|
||||
struct {
|
||||
uint32_t addr;
|
||||
uint32_t size;
|
||||
} prd;
|
||||
target_phys_addr_t cur_addr;
|
||||
int len, i, len1;
|
||||
|
||||
cur_addr = bm->addr;
|
||||
/* at most one page to avoid hanging if erroneous parameters */
|
||||
for(i = 0; i < 512; i++) {
|
||||
cpu_physical_memory_read(cur_addr, (uint8_t *)&prd, 8);
|
||||
prd.addr = le32_to_cpu(prd.addr);
|
||||
prd.size = le32_to_cpu(prd.size);
|
||||
#ifdef DEBUG_IDE
|
||||
printf("ide: dma: prd: %08x: addr=0x%08x size=0x%08x\n",
|
||||
(int)cur_addr, prd.addr, prd.size);
|
||||
#endif
|
||||
len = prd.size & 0xfffe;
|
||||
if (len == 0)
|
||||
len = 0x10000;
|
||||
while (len > 0) {
|
||||
len1 = bm->dma_cb(bm->ide_if, prd.addr, len);
|
||||
if (len1 == 0)
|
||||
goto the_end;
|
||||
prd.addr += len1;
|
||||
len -= len1;
|
||||
}
|
||||
/* end of transfer */
|
||||
if (prd.size & 0x80000000)
|
||||
break;
|
||||
cur_addr += 8;
|
||||
}
|
||||
/* end of transfer */
|
||||
the_end:
|
||||
bm->status &= ~BM_STATUS_DMAING;
|
||||
bm->status |= BM_STATUS_INT;
|
||||
bm->dma_cb = NULL;
|
||||
bm->ide_if = NULL;
|
||||
}
|
||||
|
||||
static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb)
|
||||
static void ide_dma_start(IDEState *s, BlockDriverCompletionFunc *dma_cb)
|
||||
{
|
||||
BMDMAState *bm = s->bmdma;
|
||||
if(!bm)
|
||||
return;
|
||||
bm->ide_if = s;
|
||||
bm->dma_cb = dma_cb;
|
||||
bm->cur_addr = bm->addr;
|
||||
bm->cur_prd_last = 0;
|
||||
bm->cur_prd_addr = 0;
|
||||
bm->cur_prd_len = 0;
|
||||
if (bm->status & BM_STATUS_DMAING) {
|
||||
ide_dma_loop(bm);
|
||||
bm->dma_cb(bm, 0);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2167,14 +2190,28 @@ static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
|
||||
#endif
|
||||
if (!(val & BM_CMD_START)) {
|
||||
/* XXX: do it better */
|
||||
if (bm->status & BM_STATUS_DMAING) {
|
||||
bm->status &= ~BM_STATUS_DMAING;
|
||||
/* cancel DMA request */
|
||||
bm->ide_if = NULL;
|
||||
bm->dma_cb = NULL;
|
||||
if (bm->aiocb) {
|
||||
#ifdef DEBUG_AIO
|
||||
printf("aio_cancel\n");
|
||||
#endif
|
||||
bdrv_aio_cancel(bm->aiocb);
|
||||
bm->aiocb = NULL;
|
||||
}
|
||||
}
|
||||
bm->cmd = val & 0x09;
|
||||
} else {
|
||||
if (!(bm->status & BM_STATUS_DMAING)) {
|
||||
bm->status |= BM_STATUS_DMAING;
|
||||
bm->cmd = val & 0x09;
|
||||
/* start dma transfer if possible */
|
||||
if (bm->dma_cb)
|
||||
ide_dma_loop(bm);
|
||||
bm->dma_cb(bm, 0);
|
||||
}
|
||||
bm->cmd = val & 0x09;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user