hw/arm_gic: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR to report guest accesses to bad offsets. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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12
hw/arm_gic.c
12
hw/arm_gic.c
@ -324,7 +324,8 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset)
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}
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return res;
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bad_reg:
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hw_error("gic_dist_readb: Bad offset %x\n", (int)offset);
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qemu_log_mask(LOG_GUEST_ERROR,
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"gic_dist_readb: Bad offset %x\n", (int)offset);
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return 0;
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}
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@ -487,7 +488,8 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
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gic_update(s);
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return;
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bad_reg:
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hw_error("gic_dist_writeb: Bad offset %x\n", (int)offset);
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qemu_log_mask(LOG_GUEST_ERROR,
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"gic_dist_writeb: Bad offset %x\n", (int)offset);
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}
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static void gic_dist_writew(void *opaque, hwaddr offset,
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@ -556,7 +558,8 @@ static uint32_t gic_cpu_read(GICState *s, int cpu, int offset)
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case 0x18: /* Highest Pending Interrupt */
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return s->current_pending[cpu];
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default:
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hw_error("gic_cpu_read: Bad offset %x\n", (int)offset);
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qemu_log_mask(LOG_GUEST_ERROR,
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"gic_cpu_read: Bad offset %x\n", (int)offset);
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return 0;
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}
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}
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@ -577,7 +580,8 @@ static void gic_cpu_write(GICState *s, int cpu, int offset, uint32_t value)
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case 0x10: /* End Of Interrupt */
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return gic_complete_irq(s, cpu, value & 0x3ff);
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default:
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hw_error("gic_cpu_write: Bad offset %x\n", (int)offset);
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qemu_log_mask(LOG_GUEST_ERROR,
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"gic_cpu_write: Bad offset %x\n", (int)offset);
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return;
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}
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gic_update(s);
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