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target-i386/kvm: set Hyper-V features cpuid bit HV_X64_MSR_VP_INDEX_AVAILABLE

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Hyper-V features bit HV_X64_MSR_VP_INDEX_AVAILABLE value is
based on cpu option "hv-vpindex" and kernel support of
HV_X64_MSR_VP_INDEX.

Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com>
Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Eduardo Habkost <ehabkost@redhat.com>
CC: "Andreas Färber" <afaerber@suse.de>
CC: Marcelo Tosatti <mtosatti@redhat.com>
Message-Id: <1442397584-16698-3-git-send-email-den@openvz.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Andrey Smetanin 2015-09-16 12:59:43 +03:00 committed by Paolo Bonzini
parent 744b8a9440
commit 8c145d7ca9
3 changed files with 12 additions and 1 deletions
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1
target-i386/cpu-qom.h
View File

@ -91,6 +91,7 @@ typedef struct X86CPU {
bool hyperv_time; bool hyperv_time;
bool hyperv_crash; bool hyperv_crash;
bool hyperv_reset; bool hyperv_reset;
bool hyperv_vpindex;
bool check_cpuid; bool check_cpuid;
bool enforce_cpuid; bool enforce_cpuid;
bool expose_kvm; bool expose_kvm;

1
target-i386/cpu.c
View File

@ -3141,6 +3141,7 @@ static Property x86_cpu_properties[] = {
DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false), DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false),
DEFINE_PROP_BOOL("hv-crash", X86CPU, hyperv_crash, false), DEFINE_PROP_BOOL("hv-crash", X86CPU, hyperv_crash, false),
DEFINE_PROP_BOOL("hv-reset", X86CPU, hyperv_reset, false), DEFINE_PROP_BOOL("hv-reset", X86CPU, hyperv_reset, false),
DEFINE_PROP_BOOL("hv-vpindex", X86CPU, hyperv_vpindex, false),
DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false), DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false),
DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false), DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),

11
target-i386/kvm.c
View File

@ -83,6 +83,7 @@ static bool has_msr_hv_vapic;
static bool has_msr_hv_tsc; static bool has_msr_hv_tsc;
static bool has_msr_hv_crash; static bool has_msr_hv_crash;
static bool has_msr_hv_reset; static bool has_msr_hv_reset;
static bool has_msr_hv_vpindex;
static bool has_msr_mtrr; static bool has_msr_mtrr;
static bool has_msr_xss; static bool has_msr_xss;
@ -462,7 +463,8 @@ static bool hyperv_enabled(X86CPU *cpu)
cpu->hyperv_time || cpu->hyperv_time ||
cpu->hyperv_relaxed_timing || cpu->hyperv_relaxed_timing ||
cpu->hyperv_crash || cpu->hyperv_crash ||
cpu->hyperv_reset); cpu->hyperv_reset ||
cpu->hyperv_vpindex);
} }
static Error *invtsc_mig_blocker; static Error *invtsc_mig_blocker;
@ -534,6 +536,9 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->hyperv_reset && has_msr_hv_reset) { if (cpu->hyperv_reset && has_msr_hv_reset) {
c->eax |= HV_X64_MSR_RESET_AVAILABLE; c->eax |= HV_X64_MSR_RESET_AVAILABLE;
} }
if (cpu->hyperv_vpindex && has_msr_hv_vpindex) {
c->eax |= HV_X64_MSR_VP_INDEX_AVAILABLE;
}
c = &cpuid_data.entries[cpuid_i++]; c = &cpuid_data.entries[cpuid_i++];
c->function = HYPERV_CPUID_ENLIGHTMENT_INFO; c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;
if (cpu->hyperv_relaxed_timing) { if (cpu->hyperv_relaxed_timing) {
@ -866,6 +871,10 @@ static int kvm_get_supported_msrs(KVMState *s)
has_msr_hv_reset = true; has_msr_hv_reset = true;
continue; continue;
} }
if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_INDEX) {
has_msr_hv_vpindex = true;
continue;
}
} }
} }