ati-vga: Add limited support for big endian frame buffer aperture
Set frame buffer endianness according to requested endianness for frame buffer apertures. We set frame buffer to big endian if any of the two apertures are set to big endian. Using different endianness for the two apertures is not implemented. This fixes inverted colors with MacOS and Xorg frame buffer driver but some Linux drivers may have endianness issues even on real hardware so this may not fix all cases. MorphOS uses aper0 in LE, Linux uses aper0 in BE and MacOS uses aper1 in BE but not sure about others or if MacOS also may need aper0 in which case we'll need a more complex fix but MacOS has other problems yet so for now this might work. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: e2a7ec7af3fc30523213bcd27832ccad34323f2c.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -90,7 +90,9 @@ static void ati_vga_switch_mode(ATIVGAState *s)
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DPRINTF("Switching to %dx%d %d %d @ %x\n", h, v, stride, bpp, offs);
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vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_ENABLE);
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vbe_ioport_write_data(&s->vga, 0, VBE_DISPI_DISABLED);
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s->vga.big_endian_fb = false;
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s->vga.big_endian_fb = (s->regs.config_cntl & APER_0_ENDIAN ||
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s->regs.config_cntl & APER_1_ENDIAN ?
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true : false);
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/* reset VBE regs then set up mode */
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s->vga.vbe_regs[VBE_DISPI_INDEX_XRES] = h;
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s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] = v;
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@ -310,6 +312,9 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size)
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case PALETTE_DATA:
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val = vga_ioport_read(&s->vga, VGA_PEL_D);
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break;
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case CNFG_CNTL:
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val = s->regs.config_cntl;
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break;
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case CNFG_MEMSIZE:
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val = s->vga.vram_size;
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break;
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@ -604,6 +609,9 @@ static void ati_mm_write(void *opaque, hwaddr addr,
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data >>= 8;
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vga_ioport_write(&s->vga, VGA_PEL_D, data & 0xff);
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break;
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case CNFG_CNTL:
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s->regs.config_cntl = data;
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break;
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case CRTC_H_TOTAL_DISP:
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s->regs.crtc_h_total_disp = data & 0x07ff07ff;
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break;
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@ -39,6 +39,7 @@ typedef struct ATIVGARegs {
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uint32_t gpio_vga_ddc;
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uint32_t gpio_dvi_ddc;
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uint32_t gpio_monid;
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uint32_t config_cntl;
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uint32_t crtc_h_total_disp;
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uint32_t crtc_h_sync_strt_wid;
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uint32_t crtc_v_total_disp;
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@ -317,6 +317,8 @@
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#define X_MPLL_REF_DIV_MASK 0x000000FF
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/* Config control values (CONFIG_CNTL) */
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#define APER_0_ENDIAN 0x00000003
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#define APER_1_ENDIAN 0x0000000c
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#define CFG_VGA_IO_DIS 0x00000400
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/* CRTC control values (CRTC_GEN_CNTL) */
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