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target/arm: Report unsupported MPU region sizes more clearly

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Currently our PMSAv7 and ARMv7M MPU implementation cannot handle
MPU region sizes smaller than our TARGET_PAGE_SIZE. However we
report that in a slightly confusing way:

 DRSR[3]: No support for MPU (sub)region alignment of 9 bits. Minimum is 10

The problem is not the alignment of the region, but its size;
tweak the error message to say so:
 DRSR[3]: No support for MPU (sub)region size of 512 bytes. Minimum is 1024.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180405172554.27401-1-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2018-04-10 13:02:25 +01:00
parent f640a5914f
commit 8aec759b45
1 changed files with 3 additions and 3 deletions
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6
target/arm/helper.c
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@ -9625,9 +9625,9 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
}
if (rsize < TARGET_PAGE_BITS) {
qemu_log_mask(LOG_UNIMP,
"DRSR[%d]: No support for MPU (sub)region "
"alignment of %" PRIu32 " bits. Minimum is %d\n",
n, rsize, TARGET_PAGE_BITS);
"DRSR[%d]: No support for MPU (sub)region size of"
" %" PRIu32 " bytes. Minimum is %d.\n",
n, (1 << rsize), TARGET_PAGE_SIZE);
continue;
}
if (srdis) {