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ahci: Clean up reset functions

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Properly register reset functions via the device class.

CC: Alexander Graf <agraf@suse.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jan Kiszka 2012-05-11 11:42:36 -03:00 committed by Michael S. Tsirkin
parent 8e729e3b52
commit 8ab60a0703
3 changed files with 20 additions and 17 deletions
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25
hw/ide/ahci.c
View File

@ -339,7 +339,7 @@ static void ahci_mem_write(void *opaque, target_phys_addr_t addr,
case HOST_CTL: /* R/W */
if (val & HOST_CTL_RESET) {
DPRINTF(-1, "HBA Reset\n");
ahci_reset(container_of(s, AHCIPCIState, ahci));
ahci_reset(s);
} else {
s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN;
ahci_check_irq(s);
@ -1149,21 +1149,20 @@ void ahci_uninit(AHCIState *s)
g_free(s->dev);
}
void ahci_reset(void *opaque)
void ahci_reset(AHCIState *s)
{
struct AHCIPCIState *d = opaque;
AHCIPortRegs *pr;
int i;
d->ahci.control_regs.irqstatus = 0;
d->ahci.control_regs.ghc = 0;
s->control_regs.irqstatus = 0;
s->control_regs.ghc = 0;
for (i = 0; i < d->ahci.ports; i++) {
pr = &d->ahci.dev[i].port_regs;
for (i = 0; i < s->ports; i++) {
pr = &s->dev[i].port_regs;
pr->irq_stat = 0;
pr->irq_mask = 0;
pr->scr_ctl = 0;
ahci_reset_port(&d->ahci, i);
ahci_reset_port(s, i);
}
}
@ -1178,6 +1177,13 @@ static const VMStateDescription vmstate_sysbus_ahci = {
.unmigratable = 1,
};
static void sysbus_ahci_reset(DeviceState *dev)
{
SysbusAHCIState *s = DO_UPCAST(SysbusAHCIState, busdev.qdev, dev);
ahci_reset(&s->ahci);
}
static int sysbus_ahci_init(SysBusDevice *dev)
{
SysbusAHCIState *s = FROM_SYSBUS(SysbusAHCIState, dev);
@ -1185,8 +1191,6 @@ static int sysbus_ahci_init(SysBusDevice *dev)
sysbus_init_mmio(dev, &s->ahci.mem);
sysbus_init_irq(dev, &s->ahci.irq);
qemu_register_reset(ahci_reset, &s->ahci);
return 0;
}
@ -1203,6 +1207,7 @@ static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
sbc->init = sysbus_ahci_init;
dc->vmsd = &vmstate_sysbus_ahci;
dc->props = sysbus_ahci_properties;
dc->reset = sysbus_ahci_reset;
}
static TypeInfo sysbus_ahci_info = {

2
hw/ide/ahci.h
View File

@ -332,6 +332,6 @@ typedef struct NCQFrame {
void ahci_init(AHCIState *s, DeviceState *qdev, int ports);
void ahci_uninit(AHCIState *s);
void ahci_reset(void *opaque);
void ahci_reset(AHCIState *s);
#endif /* HW_IDE_AHCI_H */

10
hw/ide/ich.c
View File

@ -84,12 +84,12 @@ static const VMStateDescription vmstate_ahci = {
.unmigratable = 1,
};
static void pci_ich9_reset(void *opaque)
static void pci_ich9_reset(DeviceState *dev)
{
struct AHCIPCIState *d = opaque;
struct AHCIPCIState *d = DO_UPCAST(struct AHCIPCIState, card.qdev, dev);
msi_reset(&d->card);
ahci_reset(opaque);
ahci_reset(&d->ahci);
}
static int pci_ich9_ahci_init(PCIDevice *dev)
@ -110,8 +110,6 @@ static int pci_ich9_ahci_init(PCIDevice *dev)
/* XXX Software should program this register */
d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */
qemu_register_reset(pci_ich9_reset, d);
msi_init(dev, 0x50, 1, true, false);
d->ahci.irq = d->card.irq[0];
@ -141,7 +139,6 @@ static int pci_ich9_uninit(PCIDevice *dev)
d = DO_UPCAST(struct AHCIPCIState, card, dev);
msi_uninit(dev);
qemu_unregister_reset(pci_ich9_reset, d);
ahci_uninit(&d->ahci);
return 0;
@ -167,6 +164,7 @@ static void ich_ahci_class_init(ObjectClass *klass, void *data)
k->revision = 0x02;
k->class_id = PCI_CLASS_STORAGE_SATA;
dc->vmsd = &vmstate_ahci;
dc->reset = pci_ich9_reset;
}
static TypeInfo ich_ahci_info = {