target-arm: Add PMUSERENR_EL0 register
The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington <christopher.covington@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: b30d536cb16ec57b4412172bb6dbc3f00d293e7d.1455060548.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1105,6 +1105,12 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
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.fieldoffset = offsetof(CPUARMState, cp15.c9_pmuserenr),
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.fieldoffset = offsetof(CPUARMState, cp15.c9_pmuserenr),
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.resetvalue = 0,
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.resetvalue = 0,
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.writefn = pmuserenr_write, .raw_writefn = raw_write },
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.writefn = pmuserenr_write, .raw_writefn = raw_write },
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{ .name = "PMUSERENR_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 9, .crm = 14, .opc2 = 0,
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.access = PL0_R | PL1_RW, .type = ARM_CP_ALIAS,
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.fieldoffset = offsetof(CPUARMState, cp15.c9_pmuserenr),
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.resetvalue = 0,
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.writefn = pmuserenr_write, .raw_writefn = raw_write },
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{ .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 1,
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{ .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 1,
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.access = PL1_RW,
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.access = PL1_RW,
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.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
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.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
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