diff --git a/tests/ahci-test.c b/tests/ahci-test.c index 32b6be3b92..4cc7e21a43 100644 --- a/tests/ahci-test.c +++ b/tests/ahci-test.c @@ -751,6 +751,7 @@ static void ahci_test_identify(AHCIQState *ahci) ahci_port_check_error(ahci, i); /* BUG: we expect AHCI_PX_IS_DPS to be set. */ ahci_port_check_interrupts(ahci, i, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS); + ahci_port_check_nonbusy(ahci, i, cx); /* Investigate the CMD, assert that we read 512 bytes */ ahci_get_command_header(ahci, i, cx, &cmd); diff --git a/tests/libqos/ahci.c b/tests/libqos/ahci.c index ef84cc6660..7ed6494805 100644 --- a/tests/libqos/ahci.c +++ b/tests/libqos/ahci.c @@ -347,6 +347,24 @@ void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), ==, 0); } +void ahci_port_check_nonbusy(AHCIQState *ahci, uint8_t port, uint8_t slot) +{ + uint32_t reg; + + /* Assert that the command slot is no longer busy (NCQ) */ + reg = ahci_px_rreg(ahci, port, AHCI_PX_SACT); + ASSERT_BIT_CLEAR(reg, (1 << slot)); + + /* Non-NCQ */ + reg = ahci_px_rreg(ahci, port, AHCI_PX_CI); + ASSERT_BIT_CLEAR(reg, (1 << slot)); + + /* And assert that we are generally not busy. */ + reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_BSY); + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_DRQ); +} + /* Get the command in #slot of port #port. */ void ahci_get_command_header(AHCIQState *ahci, uint8_t port, uint8_t slot, AHCICommandHeader *cmd) diff --git a/tests/libqos/ahci.h b/tests/libqos/ahci.h index a2ffa70d22..eaad076f46 100644 --- a/tests/libqos/ahci.h +++ b/tests/libqos/ahci.h @@ -436,6 +436,7 @@ void ahci_port_clear(AHCIQState *ahci, uint8_t port); void ahci_port_check_error(AHCIQState *ahci, uint8_t port); void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, uint32_t intr_mask); +void ahci_port_check_nonbusy(AHCIQState *ahci, uint8_t port, uint8_t slot); void ahci_get_command_header(AHCIQState *ahci, uint8_t port, uint8_t slot, AHCICommandHeader *cmd); void ahci_set_command_header(AHCIQState *ahci, uint8_t port,