From 88eeee0a31c696b26f8df3dfe2221b955f8d878e Mon Sep 17 00:00:00 2001 From: balrog Date: Mon, 10 Dec 2007 00:28:27 +0000 Subject: [PATCH] Desambiguate pflash_register(). pflash_t is still ambiguous... perhaps both emulations should sit in a single file. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3794 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/flash.h | 19 +++++++++++++------ hw/gumstix.c | 4 ++-- hw/mainstone.c | 6 ++++-- hw/pflash_cfi01.c | 10 +++++----- hw/pflash_cfi02.c | 10 +++++----- hw/ppc405_boards.c | 18 +++++++++--------- 6 files changed, 38 insertions(+), 29 deletions(-) diff --git a/hw/flash.h b/hw/flash.h index e3c898a34c..95ac62862d 100644 --- a/hw/flash.h +++ b/hw/flash.h @@ -1,11 +1,19 @@ /* NOR flash devices */ typedef struct pflash_t pflash_t; -pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, - BlockDriverState *bs, - uint32_t sector_len, int nb_blocs, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3); +/* pflash_cfi01.c */ +pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, + BlockDriverState *bs, + uint32_t sector_len, int nb_blocs, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3); + +/* pflash_cfi02.c */ +pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, + BlockDriverState *bs, + uint32_t sector_len, int nb_blocs, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3); /* nand.c */ struct nand_flash_s; @@ -37,4 +45,3 @@ uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample); void ecc_reset(struct ecc_state_s *s); void ecc_put(QEMUFile *f, struct ecc_state_s *s); void ecc_get(QEMUFile *f, struct ecc_state_s *s); - diff --git a/hw/gumstix.c b/hw/gumstix.c index 21325177c5..2cf52f9c07 100644 --- a/hw/gumstix.c +++ b/hw/gumstix.c @@ -67,7 +67,7 @@ static void connex_init(int ram_size, int vga_ram_size, exit(1); } - if (!pflash_register(0x00000000, qemu_ram_alloc(connex_rom), + if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(connex_rom), drives_table[index].bdrv, sector_len, connex_rom / sector_len, 2, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); @@ -107,7 +107,7 @@ static void verdex_init(int ram_size, int vga_ram_size, exit(1); } - if (!pflash_register(0x00000000, qemu_ram_alloc(verdex_rom), + if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom), drives_table[index].bdrv, sector_len, verdex_rom / sector_len, 2, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); diff --git a/hw/mainstone.c b/hw/mainstone.c index 8793b336e2..558deed035 100644 --- a/hw/mainstone.c +++ b/hw/mainstone.c @@ -55,7 +55,8 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, "'pflash' parameter\n"); exit(1); } - if (!pflash_register(MST_FLASH_0, mainstone_ram + PXA2XX_INTERNAL_SIZE, + if (!pflash_cfi01_register(MST_FLASH_0, + mainstone_ram + PXA2XX_INTERNAL_SIZE, drives_table[index].bdrv, 256 * 1024, 128, 4, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); @@ -68,7 +69,8 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, "'pflash' parameter\n"); exit(1); } - if (!pflash_register(MST_FLASH_1, mainstone_ram + PXA2XX_INTERNAL_SIZE, + if (!pflash_cfi01_register(MST_FLASH_1, + mainstone_ram + PXA2XX_INTERNAL_SIZE, drives_table[index].bdrv, 256 * 1024, 128, 4, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index f50d7bae77..745f5e57c5 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -483,11 +483,11 @@ static int ctz32 (uint32_t n) return ret; } -pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, - BlockDriverState *bs, - target_ulong sector_len, int nb_blocs, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3) +pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, + BlockDriverState *bs, target_ulong sector_len, + int nb_blocs, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3) { pflash_t *pfl; target_long total_len; diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index eaf6750bb8..d5b3f32793 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -524,11 +524,11 @@ static int ctz32 (uint32_t n) return ret; } -pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, - BlockDriverState *bs, - uint32_t sector_len, int nb_blocs, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3) +pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, + BlockDriverState *bs, target_ulong sector_len, + int nb_blocs, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3) { pflash_t *pfl; int32_t total_len; diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c index 597f9b58a6..b96a188490 100644 --- a/hw/ppc405_boards.c +++ b/hw/ppc405_boards.c @@ -234,9 +234,9 @@ static void ref405ep_init (int ram_size, int vga_ram_size, fl_idx, bios_size, bios_offset, -bios_size, bdrv_get_device_name(drives_table[index].bdrv), fl_sectors); #endif - pflash_register((uint32_t)(-bios_size), bios_offset, - drives_table[index].bdrv, 65536, fl_sectors, 2, - 0x0001, 0x22DA, 0x0000, 0x0000); + pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, + drives_table[index].bdrv, 65536, fl_sectors, 2, + 0x0001, 0x22DA, 0x0000, 0x0000); fl_idx++; } else #endif @@ -551,9 +551,9 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size, fl_idx, bios_size, bios_offset, -bios_size, bdrv_get_device_name(drives_table[index].bdrv), fl_sectors); #endif - pflash_register((uint32_t)(-bios_size), bios_offset, - drives_table[index].bdrv, 65536, fl_sectors, 4, - 0x0001, 0x22DA, 0x0000, 0x0000); + pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, + drives_table[index].bdrv, 65536, fl_sectors, 4, + 0x0001, 0x22DA, 0x0000, 0x0000); fl_idx++; } else #endif @@ -587,9 +587,9 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size, fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000, bdrv_get_device_name(drives_table[index].bdrv)); #endif - pflash_register(0xfc000000, bios_offset, drives_table[index].bdrv, - 65536, fl_sectors, 4, - 0x0001, 0x22DA, 0x0000, 0x0000); + pflash_cfi02_register(0xfc000000, bios_offset, + drives_table[index].bdrv, 65536, fl_sectors, 4, + 0x0001, 0x22DA, 0x0000, 0x0000); fl_idx++; } /* Register CLPD & LCD display */