target-i386: tweak handling of PG_NX_MASK
Remove the tail of the PAE case, so that we can use "goto" in the next patch to jump to the protection checks. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -657,8 +657,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
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ptep &= pte ^ PG_NX_MASK;
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ptep &= pte ^ PG_NX_MASK;
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page_size = 4096;
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page_size = 4096;
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}
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}
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ptep ^= PG_NX_MASK;
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} else {
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} else {
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uint32_t pde;
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uint32_t pde;
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@ -670,10 +668,11 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
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error_code = 0;
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error_code = 0;
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goto do_fault;
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goto do_fault;
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}
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}
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ptep = pde | PG_NX_MASK;
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/* if PSE bit is set, then we use a 4MB page */
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/* if PSE bit is set, then we use a 4MB page */
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if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
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if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
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page_size = 4096 * 1024;
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page_size = 4096 * 1024;
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ptep = pde;
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pte_addr = pde_addr;
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pte_addr = pde_addr;
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pte = pde;
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pte = pde;
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} else {
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} else {
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@ -691,11 +690,12 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
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goto do_fault;
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goto do_fault;
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}
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}
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/* combine pde and pte user and rw protections */
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/* combine pde and pte user and rw protections */
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ptep = pte & pde;
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ptep &= pte | PG_NX_MASK;
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page_size = 4096;
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page_size = 4096;
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}
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}
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}
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}
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ptep ^= PG_NX_MASK;
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if ((ptep & PG_NX_MASK) && is_write1 == 2) {
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if ((ptep & PG_NX_MASK) && is_write1 == 2) {
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goto do_fault_protect;
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goto do_fault_protect;
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}
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}
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