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target/arm: Move definition of 'host' cpu type into cpu.c

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Move the definition of the 'host' cpu type into cpu.c, where all the
other CPU types are defined.  We can do this now we've decoupled it
from the KVM-specific host feature probing.  This means we now create
the type unconditionally (assuming we were built with KVM support at
all), but if you try to use it without -enable-kvm this will end
up in the "host cpu probe failed and KVM not enabled" path in
arm_cpu_realizefn(), for an appropriate error message.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180308130626.12393-3-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2018-03-09 17:09:44 +00:00
parent c4487d76d5
commit 86f0a186d6
2 changed files with 24 additions and 19 deletions
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24
target/arm/cpu.c
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@ -1864,6 +1864,26 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
#endif #endif
} }
#ifdef CONFIG_KVM
static void arm_host_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
kvm_arm_set_cpu_features_from_host(cpu);
}
static const TypeInfo host_arm_cpu_type_info = {
.name = TYPE_ARM_HOST_CPU,
#ifdef TARGET_AARCH64
.parent = TYPE_AARCH64_CPU,
#else
.parent = TYPE_ARM_CPU,
#endif
.instance_init = arm_host_initfn,
};
#endif
static void cpu_register(const ARMCPUInfo *info) static void cpu_register(const ARMCPUInfo *info)
{ {
TypeInfo type_info = { TypeInfo type_info = {
@ -1908,6 +1928,10 @@ static void arm_cpu_register_types(void)
cpu_register(info); cpu_register(info);
info++; info++;
} }
#ifdef CONFIG_KVM
type_register_static(&host_arm_cpu_type_info);
#endif
} }
type_init(arm_cpu_register_types) type_init(arm_cpu_register_types)

19
target/arm/kvm.c
View File

@ -152,23 +152,6 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
env->features = arm_host_cpu_features.features; env->features = arm_host_cpu_features.features;
} }
static void kvm_arm_host_cpu_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
kvm_arm_set_cpu_features_from_host(cpu);
}
static const TypeInfo host_arm_cpu_type_info = {
.name = TYPE_ARM_HOST_CPU,
#ifdef TARGET_AARCH64
.parent = TYPE_AARCH64_CPU,
#else
.parent = TYPE_ARM_CPU,
#endif
.instance_init = kvm_arm_host_cpu_initfn,
};
int kvm_arch_init(MachineState *ms, KVMState *s) int kvm_arch_init(MachineState *ms, KVMState *s)
{ {
/* For ARM interrupt delivery is always asynchronous, /* For ARM interrupt delivery is always asynchronous,
@ -184,8 +167,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE); cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
type_register_static(&host_arm_cpu_type_info);
return 0; return 0;
} }