tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6838 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1094,7 +1094,14 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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args[3], P_REXW);
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args[3], P_REXW);
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break;
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break;
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case INDEX_op_bswap16_i32:
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case INDEX_op_bswap16_i64:
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tcg_out8(s, 0x66);
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tcg_out_modrm(s, 0xc1, SHIFT_ROL, args[0]);
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tcg_out8(s, 8);
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break;
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case INDEX_op_bswap32_i32:
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case INDEX_op_bswap32_i32:
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case INDEX_op_bswap32_i64:
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tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT, 0, args[0], 0);
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tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT, 0, args[0], 0);
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break;
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break;
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case INDEX_op_bswap64_i64:
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case INDEX_op_bswap64_i64:
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@ -1287,7 +1294,10 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
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{ INDEX_op_brcond_i64, { "r", "re" } },
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{ INDEX_op_brcond_i64, { "r", "re" } },
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{ INDEX_op_bswap16_i32, { "r", "0" } },
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{ INDEX_op_bswap16_i64, { "r", "0" } },
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{ INDEX_op_bswap32_i32, { "r", "0" } },
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{ INDEX_op_bswap32_i32, { "r", "0" } },
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{ INDEX_op_bswap32_i64, { "r", "0" } },
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{ INDEX_op_bswap64_i64, { "r", "0" } },
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{ INDEX_op_bswap64_i64, { "r", "0" } },
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{ INDEX_op_neg_i32, { "r", "0" } },
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{ INDEX_op_neg_i32, { "r", "0" } },
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@ -56,7 +56,10 @@ enum {
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#define TCG_TARGET_CALL_STACK_OFFSET 0
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#define TCG_TARGET_CALL_STACK_OFFSET 0
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/* optional instructions */
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/* optional instructions */
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#define TCG_TARGET_HAS_bswap16_i32
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#define TCG_TARGET_HAS_bswap16_i64
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#define TCG_TARGET_HAS_bswap32_i32
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#define TCG_TARGET_HAS_bswap32_i32
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#define TCG_TARGET_HAS_bswap32_i64
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#define TCG_TARGET_HAS_bswap64_i64
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#define TCG_TARGET_HAS_bswap64_i64
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#define TCG_TARGET_HAS_neg_i32
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#define TCG_TARGET_HAS_neg_i32
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#define TCG_TARGET_HAS_neg_i64
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#define TCG_TARGET_HAS_neg_i64
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