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sparc32: ledma extra registers

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ledma has 0x20 bytes of registers according to OBP, and at least Solaris9
reads the 5th register which is beyond what we've mapped.  So let's setup
a flag (inspired by a previous patch from Blue Swirl) to identify ledma
from espdma, and map another 16 bytes of registers which return 0.

Signed-off-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Bob Breuer 2010-12-18 11:09:04 -06:00 committed by Blue Swirl
parent 4d22c6c2ee
commit 86d1c3887f
2 changed files with 23 additions and 8 deletions
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15
hw/sparc32_dma.c
View File

@ -44,6 +44,9 @@
/* We need the mask, because one instance of the device is not page
aligned (ledma, start address 0x0010) */
#define DMA_MASK (DMA_SIZE - 1)
/* ledma has more than 4 registers, Solaris reads the 5th one */
#define DMA_ETH_SIZE (8 * sizeof(uint32_t))
#define DMA_MAX_REG_OFFSET (2 * DMA_SIZE - 1)
#define DMA_VER 0xa0000000
#define DMA_INTR 1
@ -65,6 +68,7 @@ struct DMAState {
qemu_irq irq;
void *iommu;
qemu_irq gpio[2];
uint32_t is_ledma;
};
enum {
@ -165,6 +169,9 @@ static uint32_t dma_mem_readl(void *opaque, target_phys_addr_t addr)
DMAState *s = opaque;
uint32_t saddr;
if (s->is_ledma && (addr > DMA_MAX_REG_OFFSET)) {
return 0; /* extra mystery register(s) */
}
saddr = (addr & DMA_MASK) >> 2;
trace_sparc32_dma_mem_readl(addr, s->dmaregs[saddr]);
return s->dmaregs[saddr];
@ -175,6 +182,9 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
DMAState *s = opaque;
uint32_t saddr;
if (s->is_ledma && (addr > DMA_MAX_REG_OFFSET)) {
return; /* extra mystery register(s) */
}
saddr = (addr & DMA_MASK) >> 2;
trace_sparc32_dma_mem_writel(addr, s->dmaregs[saddr], val);
switch (saddr) {
@ -254,12 +264,14 @@ static int sparc32_dma_init1(SysBusDevice *dev)
{
DMAState *s = FROM_SYSBUS(DMAState, dev);
int dma_io_memory;
int reg_size;
sysbus_init_irq(dev, &s->irq);
dma_io_memory = cpu_register_io_memory(dma_mem_read, dma_mem_write, s,
DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, DMA_SIZE, dma_io_memory);
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
sysbus_init_mmio(dev, reg_size, dma_io_memory);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
qdev_init_gpio_out(&dev->qdev, s->gpio, 2);
@ -275,6 +287,7 @@ static SysBusDeviceInfo sparc32_dma_info = {
.qdev.reset = dma_reset,
.qdev.props = (Property[]) {
DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu),
DEFINE_PROP_UINT32("is_ledma", DMAState, is_ledma, 0),
DEFINE_PROP_END_OF_LIST(),
}
};

16
hw/sun4m.c
View File

@ -378,13 +378,14 @@ static void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq)
}
static void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq,
void *iommu, qemu_irq *dev_irq)
void *iommu, qemu_irq *dev_irq, int is_ledma)
{
DeviceState *dev;
SysBusDevice *s;
dev = qdev_create(NULL, "sparc32_dma");
qdev_prop_set_ptr(dev, "iommu_opaque", iommu);
qdev_prop_set_uint32(dev, "is_ledma", is_ledma);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, parent_irq);
@ -862,10 +863,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
}
espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[18],
iommu, &espdma_irq);
iommu, &espdma_irq, 0);
ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
slavio_irq[16], iommu, &ledma_irq);
slavio_irq[16], iommu, &ledma_irq, 1);
if (graphic_depth != 8 && graphic_depth != 24) {
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
@ -1524,10 +1525,11 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
sbi_irq[0]);
espdma = sparc32_dma_init(hwdef->espdma_base, sbi_irq[3],
iounits[0], &espdma_irq);
iounits[0], &espdma_irq, 0);
/* should be lebuffer instead */
ledma = sparc32_dma_init(hwdef->ledma_base, sbi_irq[4],
iounits[0], &ledma_irq);
iounits[0], &ledma_irq, 0);
if (graphic_depth != 8 && graphic_depth != 24) {
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
@ -1707,10 +1709,10 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
slavio_irq[1]);
espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[2],
iommu, &espdma_irq);
iommu, &espdma_irq, 0);
ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
slavio_irq[3], iommu, &ledma_irq);
slavio_irq[3], iommu, &ledma_irq, 1);
if (graphic_depth != 8 && graphic_depth != 24) {
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);