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target/xtensa: Split constant in bit shift

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Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-26 13:21:14 -10:00
parent 885f21fe7d
commit 864743a685
1 changed files with 4 additions and 4 deletions
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8
target/xtensa/translate.c
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@ -2047,8 +2047,8 @@ static uint32_t test_exceptions_retw(DisasContext *dc, const OpcodeArg arg[],
static void translate_retw(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
TCGv_i32 tmp = tcg_const_i32(1);
tcg_gen_shl_i32(tmp, tmp, cpu_SR[WINDOW_BASE]);
TCGv_i32 tmp = tcg_temp_new();
tcg_gen_shl_i32(tmp, tcg_constant_i32(1), cpu_SR[WINDOW_BASE]);
tcg_gen_andc_i32(cpu_SR[WINDOW_START],
cpu_SR[WINDOW_START], tmp);
tcg_gen_movi_i32(tmp, dc->pc);
@ -2080,10 +2080,10 @@ static void translate_rfi(DisasContext *dc, const OpcodeArg arg[],
static void translate_rfw(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
TCGv_i32 tmp = tcg_const_i32(1);
TCGv_i32 tmp = tcg_temp_new();
tcg_gen_andi_i32(cpu_SR[PS], cpu_SR[PS], ~PS_EXCM);
tcg_gen_shl_i32(tmp, tmp, cpu_SR[WINDOW_BASE]);
tcg_gen_shl_i32(tmp, tcg_constant_i32(1), cpu_SR[WINDOW_BASE]);
if (par[0]) {
tcg_gen_andc_i32(cpu_SR[WINDOW_START],