tcg/ppc: Support raising sigbus for user-only
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -24,6 +24,7 @@
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#include "elf.h"
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#include "../tcg-pool.c.inc"
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#include "../tcg-ldst.c.inc"
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/*
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* Standardize on the _CALL_FOO symbols used by GCC:
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@ -1881,7 +1882,8 @@ void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx,
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}
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}
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static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target)
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static void tcg_out_call_int(TCGContext *s, int lk,
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const tcg_insn_unit *target)
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{
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#ifdef _CALL_AIX
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/* Look through the descriptor. If the branch is in range, and we
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@ -1892,7 +1894,7 @@ static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target)
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if (in_range_b(diff) && toc == (uint32_t)toc) {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP1, toc);
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tcg_out_b(s, LK, tgt);
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tcg_out_b(s, lk, tgt);
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} else {
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/* Fold the low bits of the constant into the addresses below. */
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intptr_t arg = (intptr_t)target;
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@ -1907,7 +1909,7 @@ static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target)
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R0, TCG_REG_TMP1, ofs);
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tcg_out32(s, MTSPR | RA(TCG_REG_R0) | CTR);
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_REG_TMP1, ofs + SZP);
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tcg_out32(s, BCCTR | BO_ALWAYS | LK);
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tcg_out32(s, BCCTR | BO_ALWAYS | lk);
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}
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#elif defined(_CALL_ELF) && _CALL_ELF == 2
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intptr_t diff;
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@ -1921,16 +1923,21 @@ static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target)
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diff = tcg_pcrel_diff(s, target);
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if (in_range_b(diff)) {
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tcg_out_b(s, LK, target);
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tcg_out_b(s, lk, target);
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} else {
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tcg_out32(s, MTSPR | RS(TCG_REG_R12) | CTR);
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tcg_out32(s, BCCTR | BO_ALWAYS | LK);
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tcg_out32(s, BCCTR | BO_ALWAYS | lk);
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}
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#else
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tcg_out_b(s, LK, target);
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tcg_out_b(s, lk, target);
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#endif
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}
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static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target)
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{
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tcg_out_call_int(s, LK, target);
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}
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static const uint32_t qemu_ldx_opc[(MO_SSIZE + MO_BSWAP) + 1] = {
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[MO_UB] = LBZX,
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[MO_UW] = LHZX,
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@ -1960,8 +1967,6 @@ static const uint32_t qemu_exts_opc[4] = {
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};
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#if defined (CONFIG_SOFTMMU)
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#include "../tcg-ldst.c.inc"
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/* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr,
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* int mmu_idx, uintptr_t ra)
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*/
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@ -2227,6 +2232,71 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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tcg_out_b(s, 0, lb->raddr);
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return true;
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}
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#else
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static void tcg_out_test_alignment(TCGContext *s, bool is_ld, TCGReg addrlo,
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TCGReg addrhi, unsigned a_bits)
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{
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unsigned a_mask = (1 << a_bits) - 1;
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TCGLabelQemuLdst *label = new_ldst_label(s);
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label->is_ld = is_ld;
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label->addrlo_reg = addrlo;
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label->addrhi_reg = addrhi;
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/* We are expecting a_bits to max out at 7, much lower than ANDI. */
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tcg_debug_assert(a_bits < 16);
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tcg_out32(s, ANDI | SAI(addrlo, TCG_REG_R0, a_mask));
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label->label_ptr[0] = s->code_ptr;
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tcg_out32(s, BC | BI(0, CR_EQ) | BO_COND_FALSE | LK);
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label->raddr = tcg_splitwx_to_rx(s->code_ptr);
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}
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static bool tcg_out_fail_alignment(TCGContext *s, TCGLabelQemuLdst *l)
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{
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if (!reloc_pc14(l->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
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return false;
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}
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if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
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TCGReg arg = TCG_REG_R4;
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#ifdef TCG_TARGET_CALL_ALIGN_ARGS
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arg |= 1;
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#endif
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if (l->addrlo_reg != arg) {
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tcg_out_mov(s, TCG_TYPE_I32, arg, l->addrhi_reg);
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tcg_out_mov(s, TCG_TYPE_I32, arg + 1, l->addrlo_reg);
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} else if (l->addrhi_reg != arg + 1) {
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tcg_out_mov(s, TCG_TYPE_I32, arg + 1, l->addrlo_reg);
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tcg_out_mov(s, TCG_TYPE_I32, arg, l->addrhi_reg);
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} else {
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tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R0, arg);
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tcg_out_mov(s, TCG_TYPE_I32, arg, arg + 1);
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tcg_out_mov(s, TCG_TYPE_I32, arg + 1, TCG_REG_R0);
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}
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} else {
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tcg_out_mov(s, TCG_TYPE_TL, TCG_REG_R4, l->addrlo_reg);
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}
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tcg_out_mov(s, TCG_TYPE_TL, TCG_REG_R3, TCG_AREG0);
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/* "Tail call" to the helper, with the return address back inline. */
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tcg_out_call_int(s, 0, (const void *)(l->is_ld ? helper_unaligned_ld
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: helper_unaligned_st));
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return true;
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}
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static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
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{
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return tcg_out_fail_alignment(s, l);
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}
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static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
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{
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return tcg_out_fail_alignment(s, l);
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}
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#endif /* SOFTMMU */
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static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
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@ -2238,6 +2308,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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tcg_insn_unit *label_ptr;
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#else
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unsigned a_bits;
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#endif
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datalo = *args++;
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@ -2258,6 +2330,10 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
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rbase = TCG_REG_R3;
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#else /* !CONFIG_SOFTMMU */
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a_bits = get_alignment_bits(opc);
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if (a_bits) {
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tcg_out_test_alignment(s, true, addrlo, addrhi, a_bits);
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}
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rbase = guest_base ? TCG_GUEST_BASE_REG : 0;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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tcg_out_ext32u(s, TCG_REG_TMP1, addrlo);
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@ -2313,6 +2389,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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tcg_insn_unit *label_ptr;
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#else
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unsigned a_bits;
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#endif
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datalo = *args++;
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@ -2333,6 +2411,10 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
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rbase = TCG_REG_R3;
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#else /* !CONFIG_SOFTMMU */
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a_bits = get_alignment_bits(opc);
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if (a_bits) {
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tcg_out_test_alignment(s, false, addrlo, addrhi, a_bits);
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}
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rbase = guest_base ? TCG_GUEST_BASE_REG : 0;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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tcg_out_ext32u(s, TCG_REG_TMP1, addrlo);
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@ -182,9 +182,7 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
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#define TCG_TARGET_DEFAULT_MO (0)
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#define TCG_TARGET_HAS_MEMORY_BSWAP 1
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#ifdef CONFIG_SOFTMMU
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#define TCG_TARGET_NEED_LDST_LABELS
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#endif
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#define TCG_TARGET_NEED_POOL_LABELS
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#endif
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