target/arm: Implement SVE2 integer pairwise arithmetic
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210525010358.152808-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson
Peter Maydell
parent
a47dc220e9
commit
8597dc8b86
@ -326,6 +326,51 @@ DEF_HELPER_FLAGS_5(sve_sel_zpzz_s, TCG_CALL_NO_RWG,
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DEF_HELPER_FLAGS_5(sve_sel_zpzz_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_addp_zpzz_b, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_addp_zpzz_h, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_addp_zpzz_s, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_addp_zpzz_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_smaxp_zpzz_b, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_smaxp_zpzz_h, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_smaxp_zpzz_s, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_smaxp_zpzz_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_umaxp_zpzz_b, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_umaxp_zpzz_h, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_umaxp_zpzz_s, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_umaxp_zpzz_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_sminp_zpzz_b, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_sminp_zpzz_h, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_sminp_zpzz_s, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_sminp_zpzz_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_uminp_zpzz_b, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_uminp_zpzz_h, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_uminp_zpzz_s, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve2_uminp_zpzz_d, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve_asr_zpzw_b, TCG_CALL_NO_RWG,
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void, ptr, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_5(sve_asr_zpzw_h, TCG_CALL_NO_RWG,
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@ -1140,3 +1140,11 @@ SRHADD 01000100 .. 010 100 100 ... ..... ..... @rdn_pg_rm
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URHADD 01000100 .. 010 101 100 ... ..... ..... @rdn_pg_rm
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SHSUB 01000100 .. 010 110 100 ... ..... ..... @rdm_pg_rn # SHSUBR
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UHSUB 01000100 .. 010 111 100 ... ..... ..... @rdm_pg_rn # UHSUBR
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### SVE2 integer pairwise arithmetic
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ADDP 01000100 .. 010 001 101 ... ..... ..... @rdn_pg_rm
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SMAXP 01000100 .. 010 100 101 ... ..... ..... @rdn_pg_rm
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UMAXP 01000100 .. 010 101 101 ... ..... ..... @rdn_pg_rm
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SMINP 01000100 .. 010 110 101 ... ..... ..... @rdn_pg_rm
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UMINP 01000100 .. 010 111 101 ... ..... ..... @rdn_pg_rm
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@ -690,6 +690,82 @@ DO_ZPZZ_D(sve2_uhsub_zpzz_d, uint64_t, DO_HSUB_D)
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#undef DO_ZPZZ
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#undef DO_ZPZZ_D
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/*
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* Three operand expander, operating on element pairs.
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* If the slot I is even, the elements from from VN {I, I+1}.
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* If the slot I is odd, the elements from from VM {I-1, I}.
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* Load all of the input elements in each pair before overwriting output.
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*/
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#define DO_ZPZZ_PAIR(NAME, TYPE, H, OP) \
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void HELPER(NAME)(void *vd, void *vn, void *vm, void *vg, uint32_t desc) \
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{ \
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intptr_t i, opr_sz = simd_oprsz(desc); \
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for (i = 0; i < opr_sz; ) { \
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uint16_t pg = *(uint16_t *)(vg + H1_2(i >> 3)); \
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do { \
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TYPE n0 = *(TYPE *)(vn + H(i)); \
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TYPE m0 = *(TYPE *)(vm + H(i)); \
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TYPE n1 = *(TYPE *)(vn + H(i + sizeof(TYPE))); \
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TYPE m1 = *(TYPE *)(vm + H(i + sizeof(TYPE))); \
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if (pg & 1) { \
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*(TYPE *)(vd + H(i)) = OP(n0, n1); \
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} \
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i += sizeof(TYPE), pg >>= sizeof(TYPE); \
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if (pg & 1) { \
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*(TYPE *)(vd + H(i)) = OP(m0, m1); \
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} \
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i += sizeof(TYPE), pg >>= sizeof(TYPE); \
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} while (i & 15); \
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} \
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}
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/* Similarly, specialized for 64-bit operands. */
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#define DO_ZPZZ_PAIR_D(NAME, TYPE, OP) \
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void HELPER(NAME)(void *vd, void *vn, void *vm, void *vg, uint32_t desc) \
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{ \
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intptr_t i, opr_sz = simd_oprsz(desc) / 8; \
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TYPE *d = vd, *n = vn, *m = vm; \
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uint8_t *pg = vg; \
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for (i = 0; i < opr_sz; i += 2) { \
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TYPE n0 = n[i], n1 = n[i + 1]; \
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TYPE m0 = m[i], m1 = m[i + 1]; \
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if (pg[H1(i)] & 1) { \
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d[i] = OP(n0, n1); \
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} \
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if (pg[H1(i + 1)] & 1) { \
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d[i + 1] = OP(m0, m1); \
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} \
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} \
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}
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DO_ZPZZ_PAIR(sve2_addp_zpzz_b, uint8_t, H1, DO_ADD)
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DO_ZPZZ_PAIR(sve2_addp_zpzz_h, uint16_t, H1_2, DO_ADD)
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DO_ZPZZ_PAIR(sve2_addp_zpzz_s, uint32_t, H1_4, DO_ADD)
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DO_ZPZZ_PAIR_D(sve2_addp_zpzz_d, uint64_t, DO_ADD)
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DO_ZPZZ_PAIR(sve2_umaxp_zpzz_b, uint8_t, H1, DO_MAX)
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DO_ZPZZ_PAIR(sve2_umaxp_zpzz_h, uint16_t, H1_2, DO_MAX)
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DO_ZPZZ_PAIR(sve2_umaxp_zpzz_s, uint32_t, H1_4, DO_MAX)
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DO_ZPZZ_PAIR_D(sve2_umaxp_zpzz_d, uint64_t, DO_MAX)
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DO_ZPZZ_PAIR(sve2_uminp_zpzz_b, uint8_t, H1, DO_MIN)
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DO_ZPZZ_PAIR(sve2_uminp_zpzz_h, uint16_t, H1_2, DO_MIN)
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DO_ZPZZ_PAIR(sve2_uminp_zpzz_s, uint32_t, H1_4, DO_MIN)
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DO_ZPZZ_PAIR_D(sve2_uminp_zpzz_d, uint64_t, DO_MIN)
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DO_ZPZZ_PAIR(sve2_smaxp_zpzz_b, int8_t, H1, DO_MAX)
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DO_ZPZZ_PAIR(sve2_smaxp_zpzz_h, int16_t, H1_2, DO_MAX)
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DO_ZPZZ_PAIR(sve2_smaxp_zpzz_s, int32_t, H1_4, DO_MAX)
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DO_ZPZZ_PAIR_D(sve2_smaxp_zpzz_d, int64_t, DO_MAX)
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DO_ZPZZ_PAIR(sve2_sminp_zpzz_b, int8_t, H1, DO_MIN)
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DO_ZPZZ_PAIR(sve2_sminp_zpzz_h, int16_t, H1_2, DO_MIN)
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DO_ZPZZ_PAIR(sve2_sminp_zpzz_s, int32_t, H1_4, DO_MIN)
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DO_ZPZZ_PAIR_D(sve2_sminp_zpzz_d, int64_t, DO_MIN)
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#undef DO_ZPZZ_PAIR
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#undef DO_ZPZZ_PAIR_D
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/* Three-operand expander, controlled by a predicate, in which the
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* third operand is "wide". That is, for D = N op M, the same 64-bit
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* value of M is used with all of the narrower values of N.
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@ -5957,3 +5957,9 @@ DO_SVE2_ZPZZ(SHSUB, shsub)
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DO_SVE2_ZPZZ(UHADD, uhadd)
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DO_SVE2_ZPZZ(URHADD, urhadd)
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DO_SVE2_ZPZZ(UHSUB, uhsub)
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DO_SVE2_ZPZZ(ADDP, addp)
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DO_SVE2_ZPZZ(SMAXP, smaxp)
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DO_SVE2_ZPZZ(UMAXP, umaxp)
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DO_SVE2_ZPZZ(SMINP, sminp)
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DO_SVE2_ZPZZ(UMINP, uminp)
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