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esp: lower IRQ on soft reset

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42f1ced228 removed irq lowering
during reset. However, for chip reset command and DMA reset signal,
its actually the correct thing to do.

Lower IRQ on soft reset only.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2010-06-10 17:57:39 +00:00
parent e163ae7b8f
commit 85948643b8
1 changed files with 14 additions and 5 deletions
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19
hw/esp.c
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@ -419,7 +419,7 @@ static void handle_ti(ESPState *s)
} }
} }
static void esp_reset(DeviceState *d) static void esp_hard_reset(DeviceState *d)
{ {
ESPState *s = container_of(d, ESPState, busdev.qdev); ESPState *s = container_of(d, ESPState, busdev.qdev);
@ -435,10 +435,19 @@ static void esp_reset(DeviceState *d)
s->rregs[ESP_CFG1] = 7; s->rregs[ESP_CFG1] = 7;
} }
static void esp_soft_reset(DeviceState *d)
{
ESPState *s = container_of(d, ESPState, busdev.qdev);
qemu_irq_lower(s->irq);
esp_hard_reset(d);
}
static void parent_esp_reset(void *opaque, int irq, int level) static void parent_esp_reset(void *opaque, int irq, int level)
{ {
if (level) if (level) {
esp_reset(opaque); esp_soft_reset(opaque);
}
} }
static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr) static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr)
@ -528,7 +537,7 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
break; break;
case CMD_RESET: case CMD_RESET:
DPRINTF("Chip reset (%2.2x)\n", val); DPRINTF("Chip reset (%2.2x)\n", val);
esp_reset(&s->busdev.qdev); esp_soft_reset(&s->busdev.qdev);
break; break;
case CMD_BUSRESET: case CMD_BUSRESET:
DPRINTF("Bus reset (%2.2x)\n", val); DPRINTF("Bus reset (%2.2x)\n", val);
@ -679,7 +688,7 @@ static SysBusDeviceInfo esp_info = {
.qdev.name = "esp", .qdev.name = "esp",
.qdev.size = sizeof(ESPState), .qdev.size = sizeof(ESPState),
.qdev.vmsd = &vmstate_esp, .qdev.vmsd = &vmstate_esp,
.qdev.reset = esp_reset, .qdev.reset = esp_hard_reset,
.qdev.props = (Property[]) { .qdev.props = (Property[]) {
{.name = NULL} {.name = NULL}
} }