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NaN support in FPU comparisons

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1341 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2005-03-20 10:39:24 +00:00
parent b7a100da9c
commit 8422b11337
4 changed files with 141 additions and 67 deletions
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6
target-i386/exec.h
View File

@ -325,6 +325,8 @@ static inline void stfl(target_ulong ptr, float v)
#define floatx_abs floatx80_abs
#define floatx_chs floatx80_chs
#define floatx_round_to_int floatx80_round_to_int
#define floatx_compare floatx80_compare
#define floatx_compare_quiet floatx80_compare_quiet
#define sin sinl
#define cos cosl
#define sqrt sqrtl
@ -340,6 +342,8 @@ static inline void stfl(target_ulong ptr, float v)
#define floatx_abs float64_abs
#define floatx_chs float64_chs
#define floatx_round_to_int float64_round_to_int
#define floatx_compare float64_compare
#define floatx_compare_quiet float64_compare_quiet
#endif
extern CPU86_LDouble sin(CPU86_LDouble x);
@ -547,8 +551,6 @@ void restore_native_fp_state(CPUState *env);
void save_native_fp_state(CPUState *env);
float approx_rsqrt(float a);
float approx_rcp(float a);
double helper_sqrt(double a);
int fpu_isnan(double a);
void update_fp_status(void);
extern const uint8_t parity_table[256];

6
target-i386/helper.c
View File

@ -3223,12 +3223,6 @@ void helper_idivq_EAX_T0(void)
#endif
/* XXX: do it */
int fpu_isnan(double a)
{
return 0;
}
float approx_rsqrt(float a)
{
return 1.0 / sqrt(a);

94
target-i386/op.c
View File

@ -1952,52 +1952,94 @@ void OPPROTO op_fxchg_ST0_STN(void)
/* FPU operations */
/* XXX: handle nans */
void OPPROTO op_fcom_ST0_FT0(void)
{
env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
if (ST0 < FT0)
env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
else if (ST0 == FT0)
env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
int cc;
switch(floatx_compare(ST0, FT0, &env->fp_status)) {
case -1:
cc = 0x0100;
break;
case 0:
cc = 0x4000;
break;
case 1:
cc = 0x0000;
break;
case 2:
default:
cc = 0x4500;
break;
}
env->fpus = (env->fpus & ~0x4500) | cc;
FORCE_RET();
}
/* XXX: handle nans */
void OPPROTO op_fucom_ST0_FT0(void)
{
env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
if (ST0 < FT0)
env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
else if (ST0 == FT0)
env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
int cc;
switch(floatx_compare_quiet(ST0, FT0, &env->fp_status)) {
case -1:
cc = 0x0100;
break;
case 0:
cc = 0x4000;
break;
case 1:
cc = 0x0000;
break;
case 2:
default:
cc = 0x4500;
break;
}
env->fpus = (env->fpus & ~0x4500) | cc;
FORCE_RET();
}
/* XXX: handle nans */
void OPPROTO op_fcomi_ST0_FT0(void)
{
int eflags;
int eflags, cc;
switch(floatx_compare(ST0, FT0, &env->fp_status)) {
case -1:
cc = CC_C;
break;
case 0:
cc = CC_Z;
break;
case 1:
cc = 0;
break;
case 2:
default:
cc = CC_Z | CC_P | CC_C;
break;
}
eflags = cc_table[CC_OP].compute_all();
eflags &= ~(CC_Z | CC_P | CC_C);
if (ST0 < FT0)
eflags |= CC_C;
else if (ST0 == FT0)
eflags |= CC_Z;
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | cc;
CC_SRC = eflags;
FORCE_RET();
}
/* XXX: handle nans */
void OPPROTO op_fucomi_ST0_FT0(void)
{
int eflags;
int eflags, cc;
switch(floatx_compare_quiet(ST0, FT0, &env->fp_status)) {
case -1:
cc = CC_C;
break;
case 0:
cc = CC_Z;
break;
case 1:
cc = 0;
break;
case 2:
default:
cc = CC_Z | CC_P | CC_C;
break;
}
eflags = cc_table[CC_OP].compute_all();
eflags &= ~(CC_Z | CC_P | CC_C);
if (ST0 < FT0)
eflags |= CC_C;
else if (ST0 == FT0)
eflags |= CC_Z;
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | cc;
CC_SRC = eflags;
FORCE_RET();
}

102
target-i386/ops_sse.h
View File

@ -704,7 +704,7 @@ SSE_OP_S(sqrt, FPU_SQRT)
/* float to float conversions */
void OPPROTO op_cvtps2pd(void)
{
float s0, s1;
float32 s0, s1;
Reg *d, *s;
d = (Reg *)((char *)env + PARAM1);
s = (Reg *)((char *)env + PARAM2);
@ -1031,10 +1031,10 @@ void OPPROTO op_ ## name ## ps (void)\
Reg *d, *s;\
d = (Reg *)((char *)env + PARAM1);\
s = (Reg *)((char *)env + PARAM2);\
d->XMM_L(0) = F(d->XMM_S(0), s->XMM_S(0));\
d->XMM_L(1) = F(d->XMM_S(1), s->XMM_S(1));\
d->XMM_L(2) = F(d->XMM_S(2), s->XMM_S(2));\
d->XMM_L(3) = F(d->XMM_S(3), s->XMM_S(3));\
d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
}\
\
void OPPROTO op_ ## name ## ss (void)\
@ -1042,15 +1042,15 @@ void OPPROTO op_ ## name ## ss (void)\
Reg *d, *s;\
d = (Reg *)((char *)env + PARAM1);\
s = (Reg *)((char *)env + PARAM2);\
d->XMM_L(0) = F(d->XMM_S(0), s->XMM_S(0));\
d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
}\
void OPPROTO op_ ## name ## pd (void)\
{\
Reg *d, *s;\
d = (Reg *)((char *)env + PARAM1);\
s = (Reg *)((char *)env + PARAM2);\
d->XMM_Q(0) = F(d->XMM_D(0), s->XMM_D(0));\
d->XMM_Q(1) = F(d->XMM_D(1), s->XMM_D(1));\
d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
}\
\
void OPPROTO op_ ## name ## sd (void)\
@ -1058,17 +1058,17 @@ void OPPROTO op_ ## name ## sd (void)\
Reg *d, *s;\
d = (Reg *)((char *)env + PARAM1);\
s = (Reg *)((char *)env + PARAM2);\
d->XMM_Q(0) = F(d->XMM_D(0), s->XMM_D(0));\
d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
}
#define FPU_CMPEQ(a, b) (a) == (b) ? -1 : 0
#define FPU_CMPLT(a, b) (a) < (b) ? -1 : 0
#define FPU_CMPLE(a, b) (a) <= (b) ? -1 : 0
#define FPU_CMPUNORD(a, b) (fpu_isnan(a) || fpu_isnan(b)) ? - 1 : 0
#define FPU_CMPNEQ(a, b) (a) == (b) ? 0 : -1
#define FPU_CMPNLT(a, b) (a) < (b) ? 0 : -1
#define FPU_CMPNLE(a, b) (a) <= (b) ? 0 : -1
#define FPU_CMPORD(a, b) (!fpu_isnan(a) && !fpu_isnan(b)) ? - 1 : 0
#define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0
#define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0
#define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0
#define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0
#define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1
#define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1
#define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1
#define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1
SSE_OP_CMP(cmpeq, FPU_CMPEQ)
SSE_OP_CMP(cmplt, FPU_CMPLT)
@ -1082,19 +1082,28 @@ SSE_OP_CMP(cmpord, FPU_CMPORD)
void OPPROTO op_ucomiss(void)
{
int eflags;
float s0, s1;
float32 s0, s1;
Reg *d, *s;
d = (Reg *)((char *)env + PARAM1);
s = (Reg *)((char *)env + PARAM2);
s0 = d->XMM_S(0);
s1 = s->XMM_S(0);
if (s0 < s1)
switch(float32_compare_quiet(s0, s1, &env->sse_status)) {
case -1:
eflags = CC_C;
else if (s0 == s1)
break;
case 0:
eflags = CC_Z;
else
break;
case 1:
eflags = 0;
break;
case 2:
default:
eflags = CC_Z | CC_P | CC_C;
break;
}
CC_SRC = eflags;
FORCE_RET();
}
@ -1102,19 +1111,28 @@ void OPPROTO op_ucomiss(void)
void OPPROTO op_comiss(void)
{
int eflags;
float s0, s1;
float32 s0, s1;
Reg *d, *s;
d = (Reg *)((char *)env + PARAM1);
s = (Reg *)((char *)env + PARAM2);
s0 = d->XMM_S(0);
s1 = s->XMM_S(0);
if (s0 < s1)
switch(float32_compare(s0, s1, &env->sse_status)) {
case -1:
eflags = CC_C;
else if (s0 == s1)
break;
case 0:
eflags = CC_Z;
else
break;
case 1:
eflags = 0;
break;
case 2:
default:
eflags = CC_Z | CC_P | CC_C;
break;
}
CC_SRC = eflags;
FORCE_RET();
}
@ -1122,19 +1140,28 @@ void OPPROTO op_comiss(void)
void OPPROTO op_ucomisd(void)
{
int eflags;
double d0, d1;
float64 d0, d1;
Reg *d, *s;
d = (Reg *)((char *)env + PARAM1);
s = (Reg *)((char *)env + PARAM2);
d0 = d->XMM_D(0);
d1 = s->XMM_D(0);
if (d0 < d1)
switch(float64_compare_quiet(d0, d1, &env->sse_status)) {
case -1:
eflags = CC_C;
else if (d0 == d1)
break;
case 0:
eflags = CC_Z;
else
break;
case 1:
eflags = 0;
break;
case 2:
default:
eflags = CC_Z | CC_P | CC_C;
break;
}
CC_SRC = eflags;
FORCE_RET();
}
@ -1142,19 +1169,28 @@ void OPPROTO op_ucomisd(void)
void OPPROTO op_comisd(void)
{
int eflags;
double d0, d1;
float64 d0, d1;
Reg *d, *s;
d = (Reg *)((char *)env + PARAM1);
s = (Reg *)((char *)env + PARAM2);
d0 = d->XMM_D(0);
d1 = s->XMM_D(0);
if (d0 < d1)
switch(float64_compare(d0, d1, &env->sse_status)) {
case -1:
eflags = CC_C;
else if (d0 == d1)
break;
case 0:
eflags = CC_Z;
else
break;
case 1:
eflags = 0;
break;
case 2:
default:
eflags = CC_Z | CC_P | CC_C;
break;
}
CC_SRC = eflags;
FORCE_RET();
}