imx_fec: Reserve full FSL_IMX25_FEC_SIZE page for the register file
Some i.MX SoCs (e.g. i.MX7) have FEC registers going as far as offset 0x614, so to avoid getting aborts when accessing those on QEMU, extend the register file to cover FSL_IMX25_FEC_SIZE(16K) of address space instead of just 1K. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Jason Wang <jasowang@redhat.com> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: yurovsky@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1281,7 +1281,7 @@ static void imx_eth_realize(DeviceState *dev, Error **errp)
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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memory_region_init_io(&s->iomem, OBJECT(dev), &imx_eth_ops, s,
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TYPE_IMX_FEC, 0x400);
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TYPE_IMX_FEC, FSL_IMX25_FEC_SIZE);
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sysbus_init_mmio(sbd, &s->iomem);
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sysbus_init_irq(sbd, &s->irq[0]);
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sysbus_init_irq(sbd, &s->irq[1]);
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@ -192,7 +192,6 @@ typedef struct FslIMX25State {
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#define FSL_IMX25_UART5_ADDR 0x5002C000
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#define FSL_IMX25_UART5_SIZE 0x4000
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#define FSL_IMX25_FEC_ADDR 0x50038000
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#define FSL_IMX25_FEC_SIZE 0x4000
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#define FSL_IMX25_CCM_ADDR 0x53F80000
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#define FSL_IMX25_CCM_SIZE 0x4000
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#define FSL_IMX25_GPT4_ADDR 0x53F84000
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@ -245,6 +245,7 @@ typedef struct {
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#define ENET_TX_RING_NUM 3
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#define FSL_IMX25_FEC_SIZE 0x4000
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typedef struct IMXFECState {
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/*< private >*/
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