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target-ppc: Handle memory-forced I/O controller access

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On at least the PowerPC 601, a direct-store (T=1) with bus unit ID 0x07F
is special-cased as memory-forced I/O controller access. It is supposed
to be checked immediately if T=1, bypassing all protection mechanisms
and acting cache-inhibited and global.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>

Simplified by avoiding reindentation. Added explanatory comments.

Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Hervé Poussineau 2011-06-14 23:27:56 +02:00 committed by Alexander Graf
parent b0fb84236d
commit 826e7b827c
1 changed files with 16 additions and 0 deletions
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16
target-ppc/helper.c
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@ -949,8 +949,24 @@ static inline int get_segment(CPUState *env, mmu_ctx_t *ctx,
ret = -3; ret = -3;
} }
} else { } else {
target_ulong sr;
LOG_MMU("direct store...\n"); LOG_MMU("direct store...\n");
/* Direct-store segment : absolutely *BUGGY* for now */ /* Direct-store segment : absolutely *BUGGY* for now */
/* Direct-store implies a 32-bit MMU.
* Check the Segment Register's bus unit ID (BUID).
*/
sr = env->sr[eaddr >> 28];
if ((sr & 0x1FF00000) >> 20 == 0x07f) {
/* Memory-forced I/O controller interface access */
/* If T=1 and BUID=x'07F', the 601 performs a memory access
* to SR[28-31] LA[4-31], bypassing all protection mechanisms.
*/
ctx->raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF);
ctx->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
return 0;
}
switch (type) { switch (type) {
case ACCESS_INT: case ACCESS_INT:
/* Integer load/store : only access allowed */ /* Integer load/store : only access allowed */