ppc/pnv: add SerIRQ routing registers
This is just a simple reminder that SerIRQ routing should be addressed. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190307223548.20516-8-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -39,6 +39,8 @@ enum {
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};
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};
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/* OPB Master LS registers */
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/* OPB Master LS registers */
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#define OPB_MASTER_LS_ROUTE0 0x8
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#define OPB_MASTER_LS_ROUTE1 0xC
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#define OPB_MASTER_LS_IRQ_STAT 0x50
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#define OPB_MASTER_LS_IRQ_STAT 0x50
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#define OPB_MASTER_IRQ_LPC 0x00000800
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#define OPB_MASTER_IRQ_LPC 0x00000800
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#define OPB_MASTER_LS_IRQ_MASK 0x54
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#define OPB_MASTER_LS_IRQ_MASK 0x54
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@ -521,6 +523,12 @@ static uint64_t opb_master_read(void *opaque, hwaddr addr, unsigned size)
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uint64_t val = 0xfffffffffffffffful;
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uint64_t val = 0xfffffffffffffffful;
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switch (addr) {
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switch (addr) {
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case OPB_MASTER_LS_ROUTE0: /* TODO */
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val = lpc->opb_irq_route0;
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break;
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case OPB_MASTER_LS_ROUTE1: /* TODO */
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val = lpc->opb_irq_route1;
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break;
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case OPB_MASTER_LS_IRQ_STAT:
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case OPB_MASTER_LS_IRQ_STAT:
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val = lpc->opb_irq_stat;
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val = lpc->opb_irq_stat;
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break;
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break;
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@ -547,6 +555,12 @@ static void opb_master_write(void *opaque, hwaddr addr,
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PnvLpcController *lpc = opaque;
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PnvLpcController *lpc = opaque;
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switch (addr) {
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switch (addr) {
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case OPB_MASTER_LS_ROUTE0: /* TODO */
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lpc->opb_irq_route0 = val;
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break;
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case OPB_MASTER_LS_ROUTE1: /* TODO */
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lpc->opb_irq_route1 = val;
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break;
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case OPB_MASTER_LS_IRQ_STAT:
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case OPB_MASTER_LS_IRQ_STAT:
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lpc->opb_irq_stat &= ~val;
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lpc->opb_irq_stat &= ~val;
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pnv_lpc_eval_irqs(lpc);
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pnv_lpc_eval_irqs(lpc);
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@ -55,6 +55,8 @@ typedef struct PnvLpcController {
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MemoryRegion opb_master_regs;
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MemoryRegion opb_master_regs;
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/* OPB Master LS registers */
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/* OPB Master LS registers */
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uint32_t opb_irq_route0;
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uint32_t opb_irq_route1;
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uint32_t opb_irq_stat;
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uint32_t opb_irq_stat;
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uint32_t opb_irq_mask;
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uint32_t opb_irq_mask;
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uint32_t opb_irq_pol;
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uint32_t opb_irq_pol;
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