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aspeed: Use consistent typenames

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Improve the naming of the different controller models to ease their
generation when initializing the SoC. The rename of the SMC types is
breaking migration compatibility.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190904070506.1052-5-clg@kaod.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2019-09-04 09:05:00 +02:00 committed by Peter Maydell
parent 3a71468150
commit 811a5b1d6c
3 changed files with 18 additions and 22 deletions
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25
hw/arm/aspeed_soc.c
View File

@ -112,10 +112,6 @@ static const int aspeed_soc_ast2400_irqmap[] = {
#define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap
static const char *aspeed_soc_ast2400_typenames[] = { "aspeed.smc.spi" };
static const char *aspeed_soc_ast2500_typenames[] = {
"aspeed.smc.ast2500-spi1", "aspeed.smc.ast2500-spi2" };
static const AspeedSoCInfo aspeed_socs[] = {
{
.name = "ast2400-a1",
@ -123,9 +119,6 @@ static const AspeedSoCInfo aspeed_socs[] = {
.silicon_rev = AST2400_A1_SILICON_REV,
.sram_size = 0x8000,
.spis_num = 1,
.fmc_typename = "aspeed.smc.fmc",
.spi_typename = aspeed_soc_ast2400_typenames,
.gpio_typename = "aspeed.gpio-ast2400",
.wdts_num = 2,
.irqmap = aspeed_soc_ast2400_irqmap,
.memmap = aspeed_soc_ast2400_memmap,
@ -136,9 +129,6 @@ static const AspeedSoCInfo aspeed_socs[] = {
.silicon_rev = AST2500_A1_SILICON_REV,
.sram_size = 0x9000,
.spis_num = 2,
.fmc_typename = "aspeed.smc.ast2500-fmc",
.spi_typename = aspeed_soc_ast2500_typenames,
.gpio_typename = "aspeed.gpio-ast2500",
.wdts_num = 3,
.irqmap = aspeed_soc_ast2500_irqmap,
.memmap = aspeed_soc_ast2500_memmap,
@ -158,6 +148,12 @@ static void aspeed_soc_init(Object *obj)
AspeedSoCState *s = ASPEED_SOC(obj);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
int i;
char socname[8];
char typename[64];
if (sscanf(sc->info->name, "%7s", socname) != 1) {
g_assert_not_reached();
}
for (i = 0; i < sc->info->num_cpus; i++) {
object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
@ -190,14 +186,16 @@ static void aspeed_soc_init(Object *obj)
sysbus_init_child_obj(obj, "i2c", OBJECT(&s->i2c), sizeof(s->i2c),
TYPE_ASPEED_I2C);
snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname);
sysbus_init_child_obj(obj, "fmc", OBJECT(&s->fmc), sizeof(s->fmc),
sc->info->fmc_typename);
typename);
object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs",
&error_abort);
for (i = 0; i < sc->info->spis_num; i++) {
snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname);
sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]),
sizeof(s->spi[i]), sc->info->spi_typename[i]);
sizeof(s->spi[i]), typename);
}
sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc),
@ -226,8 +224,9 @@ static void aspeed_soc_init(Object *obj)
sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma),
TYPE_ASPEED_XDMA);
snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname);
sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio),
sc->info->gpio_typename);
typename);
}
static void aspeed_soc_realize(DeviceState *dev, Error **errp)

12
hw/ssi/aspeed_smc.c
View File

@ -190,7 +190,7 @@ static const AspeedSegments aspeed_segments_ast2500_spi2[] = {
static const AspeedSMCController controllers[] = {
{
.name = "aspeed.smc.smc",
.name = "aspeed.smc-ast2400",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
@ -203,7 +203,7 @@ static const AspeedSMCController controllers[] = {
.has_dma = false,
.nregs = ASPEED_SMC_R_SMC_MAX,
}, {
.name = "aspeed.smc.fmc",
.name = "aspeed.fmc-ast2400",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
@ -216,7 +216,7 @@ static const AspeedSMCController controllers[] = {
.has_dma = true,
.nregs = ASPEED_SMC_R_MAX,
}, {
.name = "aspeed.smc.spi",
.name = "aspeed.spi1-ast2400",
.r_conf = R_SPI_CONF,
.r_ce_ctrl = 0xff,
.r_ctrl0 = R_SPI_CTRL0,
@ -229,7 +229,7 @@ static const AspeedSMCController controllers[] = {
.has_dma = false,
.nregs = ASPEED_SMC_R_SPI_MAX,
}, {
.name = "aspeed.smc.ast2500-fmc",
.name = "aspeed.fmc-ast2500",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
@ -242,7 +242,7 @@ static const AspeedSMCController controllers[] = {
.has_dma = true,
.nregs = ASPEED_SMC_R_MAX,
}, {
.name = "aspeed.smc.ast2500-spi1",
.name = "aspeed.spi1-ast2500",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
@ -255,7 +255,7 @@ static const AspeedSMCController controllers[] = {
.has_dma = false,
.nregs = ASPEED_SMC_R_MAX,
}, {
.name = "aspeed.smc.ast2500-spi2",
.name = "aspeed.spi2-ast2500",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,

3
include/hw/arm/aspeed_soc.h
View File

@ -61,9 +61,6 @@ typedef struct AspeedSoCInfo {
uint32_t silicon_rev;
uint64_t sram_size;
int spis_num;
const char *fmc_typename;
const char **spi_typename;
const char *gpio_typename;
int wdts_num;
const int *irqmap;
const hwaddr *memmap;