Preliminary PPC64/Linux host support
ppc64.ld from Heikki Lindholm's patch http://marc.info/?l=qemu-devel&m=114086179024634&w=2 Issues: x86_64 tripple faults shortly after decompressing the kernel No immediate versions of most 64 bit operations More... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4932 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
malc
parent
e0e6c8c057
commit
810260a8f3
@ -342,6 +342,10 @@ ifeq ($(ARCH),ppc)
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LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
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LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
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endif
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endif
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ifeq ($(ARCH),ppc64)
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LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
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endif
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ifeq ($(ARCH),s390)
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ifeq ($(ARCH),s390)
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LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
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LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
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endif
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endif
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27
configure
vendored
27
configure
vendored
@ -637,6 +637,24 @@ if test "$cpu" = "x86_64" \
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hostlongbits="64"
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hostlongbits="64"
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fi
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fi
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# ppc specific hostlongbits selection
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if test "$cpu" = "powerpc" ; then
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cat > $TMPC <<EOF
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int main(void){return sizeof(long);}
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EOF
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if $cc $ARCH_CFLAGS -o $TMPE $TMPC 2> /dev/null; then
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$TMPE
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case $? in
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4) hostlongbits="32";;
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8) hostlongbits="64";;
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*) echo "Couldn't determine bits per long value";;
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esac
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else
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echo hostlongbits test failed
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fi
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fi
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# check gcc options support
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# check gcc options support
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cat > $TMPC <<EOF
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cat > $TMPC <<EOF
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int main(void) {
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int main(void) {
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@ -995,8 +1013,13 @@ case "$cpu" in
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echo "#define HOST_MIPS64 1" >> $config_h
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echo "#define HOST_MIPS64 1" >> $config_h
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;;
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;;
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powerpc)
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powerpc)
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echo "ARCH=ppc" >> $config_mak
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if test "$hostlongbits" = "32"; then
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echo "#define HOST_PPC 1" >> $config_h
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echo "ARCH=ppc" >> $config_mak
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echo "#define HOST_PPC 1" >> $config_h
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else
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echo "ARCH=ppc64" >> $config_mak
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echo "#define HOST_PPC64 1" >> $config_h
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fi
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;;
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;;
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s390)
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s390)
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echo "ARCH=s390" >> $config_mak
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echo "ARCH=s390" >> $config_mak
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@ -38,7 +38,7 @@ typedef unsigned int uint32_t;
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// Linux/Sparc64 defines uint64_t
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// Linux/Sparc64 defines uint64_t
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#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
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#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
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/* XXX may be done for all 64 bits targets ? */
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/* XXX may be done for all 64 bits targets ? */
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#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__)
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#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(__powerpc64__)
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typedef unsigned long uint64_t;
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typedef unsigned long uint64_t;
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#else
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#else
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typedef unsigned long long uint64_t;
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typedef unsigned long long uint64_t;
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@ -55,7 +55,7 @@ typedef signed short int16_t;
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typedef signed int int32_t;
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typedef signed int int32_t;
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// Linux/Sparc64 defines int64_t
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// Linux/Sparc64 defines int64_t
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#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
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#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
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#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__)
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#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(__powerpc64__)
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typedef signed long int64_t;
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typedef signed long int64_t;
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#else
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#else
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typedef signed long long int64_t;
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typedef signed long long int64_t;
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11
dyngen.c
11
dyngen.c
@ -68,6 +68,13 @@
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#define elf_check_arch(x) ((x) == EM_PPC)
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#define elf_check_arch(x) ((x) == EM_PPC)
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#define ELF_USES_RELOCA
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#define ELF_USES_RELOCA
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#elif defined(HOST_PPC64)
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#define ELF_CLASS ELFCLASS64
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#define ELF_ARCH EM_PPC64
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#define elf_check_arch(x) ((x) == EM_PPC64)
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#define ELF_USES_RELOCA
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#elif defined(HOST_S390)
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#elif defined(HOST_S390)
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#define ELF_CLASS ELFCLASS32
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#define ELF_CLASS ELFCLASS32
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@ -1551,6 +1558,8 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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}
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}
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#elif defined(HOST_ARM)
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#elif defined(HOST_ARM)
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error("dyngen targets not supported on ARM");
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error("dyngen targets not supported on ARM");
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#elif defined(HOST_PPC64)
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error("dyngen targets not supported on PPC64");
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#else
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#else
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#error unsupported CPU
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#error unsupported CPU
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#endif
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#endif
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@ -2592,6 +2601,8 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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}
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}
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#elif defined(HOST_ARM)
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#elif defined(HOST_ARM)
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error("dyngen targets not supported on ARM");
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error("dyngen targets not supported on ARM");
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#elif defined(HOST_PPC64)
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error("dyngen targets not supported on PPC64");
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#else
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#else
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#error unsupported CPU
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#error unsupported CPU
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#endif
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#endif
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@ -191,6 +191,10 @@ extern int code_gen_max_blocks;
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#if defined(USE_DIRECT_JUMP)
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#if defined(USE_DIRECT_JUMP)
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#if defined(__powerpc__)
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#if defined(__powerpc__)
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#if defined(__powerpc64__)
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extern void ppc_tb_set_jmp_target(unsigned long jmp_addr, unsigned long addr);
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#define tb_set_jmp_target1 ppc_tb_set_jmp_target
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#else
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static inline void flush_icache_range(unsigned long start, unsigned long stop);
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static inline void flush_icache_range(unsigned long start, unsigned long stop);
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static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
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static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
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{
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{
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@ -223,6 +227,7 @@ static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr
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/* flush icache */
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/* flush icache */
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flush_icache_range(jmp_addr, jmp_addr + patch_size);
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flush_icache_range(jmp_addr, jmp_addr + patch_size);
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}
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}
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#endif
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#elif defined(__i386__) || defined(__x86_64__)
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#elif defined(__i386__) || defined(__x86_64__)
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static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
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static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
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{
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{
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230
ppc64.ld
Normal file
230
ppc64.ld
Normal file
@ -0,0 +1,230 @@
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/* Script for -z combreloc: combine and sort reloc sections */
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OUTPUT_FORMAT("elf64-powerpc", "elf64-powerpc",
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"elf64-powerpc")
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OUTPUT_ARCH(powerpc:common64)
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ENTRY(_start)
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SEARCH_DIR("/usr/powerpc64-unknown-linux-gnu/lib64");
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EARCH_DIR("/usr/lib/binutils/powerpc64-unknown-linux-gnu/2.16.164");
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EARCH_DIR("/usr/local/lib64"); SEARCH_DIR("/lib64"); SEARCH_DIR("/usr/lib64");
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EARCH_DIR("/usr/powerpc64-unknown-linux-gnu/lib");
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EARCH_DIR("/usr/lib/binutils/powerpc64-unknown-linux-gnu/2.16.1");
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EARCH_DIR("/usr/local/lib"); SEARCH_DIR("/lib"); SEARCH_DIR("/usr/lib");
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/* Do we need any of these for elf?
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__DYNAMIC = 0; */
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SECTIONS
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{
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/* Read-only sections, merged into text segment: */
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PROVIDE (__executable_start = 0x60000000); . = 0x60000000 + SIZEOF_HEADERS;
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.gnu.version : { *(.gnu.version) }
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.gnu.version_d : { *(.gnu.version_d) }
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.gnu.version_r : { *(.gnu.version_r) }
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.rel.dyn :
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{
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*(.rel.init)
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*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
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*(.rel.fini)
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*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
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*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
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*(.rel.ctors)
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*(.rel.dtors)
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*(.rel.got)
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*(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
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*(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
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*(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
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*(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
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*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
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}
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.rela.dyn :
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{
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*(.rela.init)
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*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
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*(.rela.fini)
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*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
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*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
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*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
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*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
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*(.rela.ctors)
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*(.rela.got)
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*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
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}
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KEEP (*(.init))
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} =0x60000000
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.text :
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{
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*(.text .stub .text.* .gnu.linkonce.t.*)
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KEEP (*(.text.*personality*))
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/* .gnu.warning sections are handled specially by elf32.em. */
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*(.gnu.warning)
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*(.sfpr .glink)
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} =0x60000000
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{
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KEEP (*(.fini))
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} =0x60000000
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PROVIDE (__etext = .);
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PROVIDE (_etext = .);
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PROVIDE (etext = .);
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.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
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.sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) }
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.sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) }
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.eh_frame_hdr : { *(.eh_frame_hdr) }
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.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
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.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table))
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/* Adjust the address for the data segment. We want to adjust up to
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the same address within the page on the next page up. */
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. = ALIGN (0x10000) - ((0x10000 - .) & (0x10000 - 1)); . =
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ATA_SEGMENT_ALIGN (0x10000, 0x1000);
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/* Exception handling */
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.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
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.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table))
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(.gcc_except_table.*) }
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/* Thread Local Storage sections */
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|
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
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.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
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/* Ensure the __preinit_array_start label is properly aligned. We
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could instead move the label definition inside the section, but
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the linker would then create the section even if it turns out to
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be empty, which isn't pretty. */
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. = ALIGN(64 / 8);
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PROVIDE (__preinit_array_start = .);
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PROVIDE (__preinit_array_end = .);
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{
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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KEEP (*crtbegin*.o(.ctors))
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The .ctor section from the crtend file contains the
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KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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}
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{
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KEEP (*crtbegin*.o(.dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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}
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.jcr : { KEEP (*(.jcr)) }
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.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }
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.dynamic : { *(.dynamic) }
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. = DATA_SEGMENT_RELRO_END (0, .);
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.data :
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{
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*(.data .data.* .gnu.linkonce.d.*)
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KEEP (*(.gnu.linkonce.d.*personality*))
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SORT(CONSTRUCTORS)
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}
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.data1 : { *(.data1) }
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.toc1 ALIGN(8) : { *(.toc1) }
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.opd ALIGN(8) : { KEEP (*(.opd)) }
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.got ALIGN(8) : { *(.got .toc) }
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/* We want the small data sections together, so single-instruction offsets
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can access them all, and initialized data all before uninitialized, so
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{
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}
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_edata = .;
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PROVIDE (edata = .);
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__bss_start = .;
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.tocbss ALIGN(8) : { *(.tocbss)}
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{
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PROVIDE (___sbss_start = .);
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*(.scommon)
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||||||
|
PROVIDE (__sbss_end = .);
|
||||||
|
PROVIDE (___sbss_end = .);
|
||||||
|
}
|
||||||
|
.plt : { *(.plt) }
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
*(.dynbss)
|
||||||
|
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||||
|
*(COMMON)
|
||||||
|
/* Align here to ensure that the .bss section occupies space up to
|
||||||
|
_end. Align after .bss to ensure correct alignment even if the
|
||||||
|
.bss section disappears because there are no input sections. */
|
||||||
|
. = ALIGN(64 / 8);
|
||||||
|
}
|
||||||
|
. = ALIGN(64 / 8);
|
||||||
|
_end = .;
|
||||||
|
PROVIDE (end = .);
|
||||||
|
. = DATA_SEGMENT_END (.);
|
||||||
|
/* Stabs debugging sections. */
|
||||||
|
.stab 0 : { *(.stab) }
|
||||||
|
.stabstr 0 : { *(.stabstr) }
|
||||||
|
.stab.excl 0 : { *(.stab.excl) }
|
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||||
|
.stab.index 0 : { *(.stab.index) }
|
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||||
|
.comment 0 : { *(.comment) }
|
||||||
|
/* DWARF debug sections.
|
||||||
|
Symbols in the DWARF debugging sections are relative to the beginning
|
||||||
|
of the section so we begin them at 0. */
|
||||||
|
/* DWARF 1 */
|
||||||
|
.debug 0 : { *(.debug) }
|
||||||
|
.line 0 : { *(.line) }
|
||||||
|
/* GNU DWARF 1 extensions */
|
||||||
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||||
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||||
|
/* DWARF 1.1 and DWARF 2 */
|
||||||
|
.debug_aranges 0 : { *(.debug_aranges) }
|
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||||
|
/* DWARF 2 */
|
||||||
|
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||||
|
.debug_line 0 : { *(.debug_line) }
|
||||||
|
.debug_frame 0 : { *(.debug_frame) }
|
||||||
|
.debug_str 0 : { *(.debug_str) }
|
||||||
|
.debug_loc 0 : { *(.debug_loc) }
|
||||||
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||||
|
/* SGI/MIPS DWARF 2 extensions */
|
||||||
|
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||||
|
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||||
|
.debug_typenames 0 : { *(.debug_typenames) }
|
||||||
|
.debug_varnames 0 : { *(.debug_varnames) }
|
||||||
|
/DISCARD/ : { *(.note.GNU-stack) }
|
||||||
|
}
|
||||||
1435
tcg/ppc64/tcg-target.c
Normal file
1435
tcg/ppc64/tcg-target.c
Normal file
File diff suppressed because it is too large
Load Diff
100
tcg/ppc64/tcg-target.h
Normal file
100
tcg/ppc64/tcg-target.h
Normal file
@ -0,0 +1,100 @@
|
|||||||
|
/*
|
||||||
|
* Tiny Code Generator for QEMU
|
||||||
|
*
|
||||||
|
* Copyright (c) 2008 Fabrice Bellard
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
#define TCG_TARGET_PPC64 1
|
||||||
|
|
||||||
|
#define TCG_TARGET_REG_BITS 64
|
||||||
|
#define TCG_TARGET_WORDS_BIGENDIAN
|
||||||
|
#define TCG_TARGET_NB_REGS 32
|
||||||
|
|
||||||
|
enum {
|
||||||
|
TCG_REG_R0 = 0,
|
||||||
|
TCG_REG_R1,
|
||||||
|
TCG_REG_R2,
|
||||||
|
TCG_REG_R3,
|
||||||
|
TCG_REG_R4,
|
||||||
|
TCG_REG_R5,
|
||||||
|
TCG_REG_R6,
|
||||||
|
TCG_REG_R7,
|
||||||
|
TCG_REG_R8,
|
||||||
|
TCG_REG_R9,
|
||||||
|
TCG_REG_R10,
|
||||||
|
TCG_REG_R11,
|
||||||
|
TCG_REG_R12,
|
||||||
|
TCG_REG_R13,
|
||||||
|
TCG_REG_R14,
|
||||||
|
TCG_REG_R15,
|
||||||
|
TCG_REG_R16,
|
||||||
|
TCG_REG_R17,
|
||||||
|
TCG_REG_R18,
|
||||||
|
TCG_REG_R19,
|
||||||
|
TCG_REG_R20,
|
||||||
|
TCG_REG_R21,
|
||||||
|
TCG_REG_R22,
|
||||||
|
TCG_REG_R23,
|
||||||
|
TCG_REG_R24,
|
||||||
|
TCG_REG_R25,
|
||||||
|
TCG_REG_R26,
|
||||||
|
TCG_REG_R27,
|
||||||
|
TCG_REG_R28,
|
||||||
|
TCG_REG_R29,
|
||||||
|
TCG_REG_R30,
|
||||||
|
TCG_REG_R31
|
||||||
|
};
|
||||||
|
|
||||||
|
/* used for function call generation */
|
||||||
|
#define TCG_REG_CALL_STACK TCG_REG_R1
|
||||||
|
#define TCG_TARGET_STACK_ALIGN 16
|
||||||
|
#define TCG_TARGET_CALL_STACK_OFFSET 8
|
||||||
|
|
||||||
|
/* optional instructions */
|
||||||
|
#define TCG_TARGET_HAS_neg_i32
|
||||||
|
#define TCG_TARGET_HAS_div_i32
|
||||||
|
#define TCG_TARGET_HAS_neg_i64
|
||||||
|
#define TCG_TARGET_HAS_div_i64
|
||||||
|
|
||||||
|
#define TCG_AREG0 TCG_REG_R27
|
||||||
|
#define TCG_AREG1 TCG_REG_R24
|
||||||
|
#define TCG_AREG2 TCG_REG_R25
|
||||||
|
#define TCG_AREG3 TCG_REG_R26
|
||||||
|
|
||||||
|
/* taken directly from tcg-dyngen.c */
|
||||||
|
#define MIN_CACHE_LINE_SIZE 8 /* conservative value */
|
||||||
|
|
||||||
|
static inline void flush_icache_range(unsigned long start, unsigned long stop)
|
||||||
|
{
|
||||||
|
unsigned long p;
|
||||||
|
|
||||||
|
start &= ~(MIN_CACHE_LINE_SIZE - 1);
|
||||||
|
stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
|
||||||
|
|
||||||
|
for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
|
||||||
|
asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
|
||||||
|
}
|
||||||
|
asm volatile ("sync" : : : "memory");
|
||||||
|
for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
|
||||||
|
asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
|
||||||
|
}
|
||||||
|
asm volatile ("sync" : : : "memory");
|
||||||
|
asm volatile ("isync" : : : "memory");
|
||||||
|
}
|
||||||
15
tcg/tcg.h
15
tcg/tcg.h
@ -414,8 +414,23 @@ uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
|
|||||||
|
|
||||||
extern uint8_t code_gen_prologue[];
|
extern uint8_t code_gen_prologue[];
|
||||||
#ifdef __powerpc__
|
#ifdef __powerpc__
|
||||||
|
#ifdef __powerpc64__
|
||||||
|
#define tcg_qemu_tb_exec(tb_ptr) \
|
||||||
|
({ unsigned long p; \
|
||||||
|
asm volatile ( \
|
||||||
|
"mtctr %1\n\t" \
|
||||||
|
"mr 3,%2\n\t" \
|
||||||
|
"bctrl\n\t" \
|
||||||
|
"mr %0,3\n\t" \
|
||||||
|
: "=r" (p) \
|
||||||
|
: "r" (code_gen_prologue), "r" (tb_ptr) \
|
||||||
|
: "3", "4", "5", "6", "7", "8", "9", "10", "11", "12"); \
|
||||||
|
p; \
|
||||||
|
})
|
||||||
|
#else
|
||||||
#define tcg_qemu_tb_exec(tb_ptr) \
|
#define tcg_qemu_tb_exec(tb_ptr) \
|
||||||
((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
|
((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
|
||||||
|
#endif
|
||||||
#else
|
#else
|
||||||
#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
|
#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user