PCI: Mask writes to RO bits in the status reg of PCI config space
The Status register in the PCI config space has some read-only bits. Any writes to those bits should be masked out. Signed-off-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6091 c046a42c-6fe2-441c-8c8c-71466251a162
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11
hw/pci.c
11
hw/pci.c
@ -381,6 +381,7 @@ void pci_default_write_config(PCIDevice *d,
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case 0x0b:
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case 0x0e:
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case 0x10 ... 0x27: /* base */
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case 0x2c ... 0x2f: /* read-only subsystem ID & vendor ID */
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case 0x30 ... 0x33: /* rom */
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case 0x3d:
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can_write = 0;
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@ -402,6 +403,7 @@ void pci_default_write_config(PCIDevice *d,
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case 0x0a:
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case 0x0b:
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case 0x0e:
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case 0x2c ... 0x2f: /* read-only subsystem ID & vendor ID */
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case 0x38 ... 0x3b: /* rom */
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case 0x3d:
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can_write = 0;
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@ -413,6 +415,15 @@ void pci_default_write_config(PCIDevice *d,
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break;
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}
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if (can_write) {
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/* Mask out writes to reserved bits in registers */
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switch (addr) {
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case 0x06:
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val &= ~PCI_STATUS_RESERVED_MASK_LO;
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break;
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case 0x07:
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val &= ~PCI_STATUS_RESERVED_MASK_HI;
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break;
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}
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d->config[addr] = val;
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}
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if (++addr > 0xff)
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15
hw/pci.h
15
hw/pci.h
@ -54,6 +54,21 @@ typedef struct PCIIORegion {
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#define PCI_MIN_GNT 0x3e /* 8 bits */
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#define PCI_MAX_LAT 0x3f /* 8 bits */
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/* Bits in the PCI Status Register (PCI 2.3 spec) */
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#define PCI_STATUS_RESERVED1 0x007
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#define PCI_STATUS_INT_STATUS 0x008
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#define PCI_STATUS_CAPABILITIES 0x010
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#define PCI_STATUS_66MHZ 0x020
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#define PCI_STATUS_RESERVED2 0x040
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#define PCI_STATUS_FAST_BACK 0x080
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#define PCI_STATUS_DEVSEL 0x600
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#define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \
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PCI_STATUS_INT_STATUS | PCI_STATUS_CAPABILITIES | \
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PCI_STATUS_66MHZ | PCI_STATUS_RESERVED2 | PCI_STATUS_FAST_BACK)
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#define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8)
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struct PCIDevice {
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/* PCI config space */
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uint8_t config[256];
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