mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr

Browse Source 
And use it instead of reaching out to the machine. This allows to get
rid of pnv_get_chip().

Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200106145645.4539-11-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Greg Kurz 2020-01-06 15:56:43 +01:00 committed by David Gibson
parent 74e51a38f7
commit 806fed593d
3 changed files with 2 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
hw/intc/pnv_xive.c
View File

@ -472,12 +472,8 @@ static uint8_t pnv_xive_get_block_id(XiveRouter *xrtr)
static PnvXive *pnv_xive_tm_get_xive(PowerPCCPU *cpu) static PnvXive *pnv_xive_tm_get_xive(PowerPCCPU *cpu)
{ {
int pir = ppc_cpu_pir(cpu); int pir = ppc_cpu_pir(cpu);
PnvChip *chip; XivePresenter *xptr = XIVE_TCTX(pnv_cpu_state(cpu)->intc)->xptr;
PnvXive *xive; PnvXive *xive = PNV_XIVE(xptr);
chip = pnv_get_chip(PNV9_PIR2CHIP(pir));
assert(chip);
xive = &PNV9_CHIP(chip)->xive;
if (!pnv_xive_is_cpu_enabled(xive, cpu)) { if (!pnv_xive_is_cpu_enabled(xive, cpu)) {
xive_error(xive, "IC: CPU %x is not enabled", pir); xive_error(xive, "IC: CPU %x is not enabled", pir);

14
hw/ppc/pnv.c
View File

@ -1717,20 +1717,6 @@ static int pnv_match_nvt(XiveFabric *xfb, uint8_t format,
return total_count; return total_count;
} }
PnvChip *pnv_get_chip(uint32_t chip_id)
{
PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
int i;
for (i = 0; i < pnv->num_chips; i++) {
PnvChip *chip = pnv->chips[i];
if (chip->chip_id == chip_id) {
return chip;
}
}
return NULL;
}
static void pnv_machine_power8_class_init(ObjectClass *oc, void *data) static void pnv_machine_power8_class_init(ObjectClass *oc, void *data)
{ {
MachineClass *mc = MACHINE_CLASS(oc); MachineClass *mc = MACHINE_CLASS(oc);

2
include/hw/ppc/pnv.h
View File

@ -219,8 +219,6 @@ struct PnvMachineState {
PnvPnor *pnor; PnvPnor *pnor;
}; };
PnvChip *pnv_get_chip(uint32_t chip_id);
#define PNV_FDT_ADDR 0x01000000 #define PNV_FDT_ADDR 0x01000000
#define PNV_TIMEBASE_FREQ 512000000ULL #define PNV_TIMEBASE_FREQ 512000000ULL