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riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes

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Now that we have added a PRCI node, update existing UART and ethernet
nodes to reference PRCI as their clock sources, to keep in sync with
the Linux kernel device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Bin Meng 2019-09-06 09:20:11 -07:00 committed by Palmer Dabbelt
parent af14c84041
commit 806c64b7b0
No known key found for this signature in database
GPG Key ID: EF4CA1502CCBAB41
2 changed files with 14 additions and 3 deletions
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7
hw/riscv/sifive_u.c
View File

@ -78,7 +78,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
int cpu; int cpu;
uint32_t *cells; uint32_t *cells;
char *nodename; char *nodename;
char ethclk_names[] = "pclk\0hclk\0tx_clk"; char ethclk_names[] = "pclk\0hclk";
uint32_t plic_phandle, prci_phandle, ethclk_phandle, phandle = 1; uint32_t plic_phandle, prci_phandle, ethclk_phandle, phandle = 1;
uint32_t uartclk_phandle; uint32_t uartclk_phandle;
uint32_t hfclk_phandle, rtcclk_phandle; uint32_t hfclk_phandle, rtcclk_phandle;
@ -263,7 +263,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
qemu_fdt_setprop_cells(fdt, nodename, "clocks", qemu_fdt_setprop_cells(fdt, nodename, "clocks",
ethclk_phandle, ethclk_phandle, ethclk_phandle); prci_phandle, PRCI_CLK_GEMGXLPLL, prci_phandle, PRCI_CLK_GEMGXLPLL);
qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names, qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names,
sizeof(ethclk_names)); sizeof(ethclk_names));
qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1);
@ -293,7 +293,8 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
qemu_fdt_setprop_cells(fdt, nodename, "reg", qemu_fdt_setprop_cells(fdt, nodename, "reg",
0x0, memmap[SIFIVE_U_UART0].base, 0x0, memmap[SIFIVE_U_UART0].base,
0x0, memmap[SIFIVE_U_UART0].size); 0x0, memmap[SIFIVE_U_UART0].size);
qemu_fdt_setprop_cell(fdt, nodename, "clocks", uartclk_phandle); qemu_fdt_setprop_cells(fdt, nodename, "clocks",
prci_phandle, PRCI_CLK_TLCLK);
qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle);
qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ);

10
include/hw/riscv/sifive_u_prci.h
View File

@ -78,4 +78,14 @@ typedef struct SiFiveUPRCIState {
uint32_t clkmuxstatus; uint32_t clkmuxstatus;
} SiFiveUPRCIState; } SiFiveUPRCIState;
/*
* Clock indexes for use by Device Tree data and the PRCI driver.
*
* These values are from sifive-fu540-prci.h in the Linux kernel.
*/
#define PRCI_CLK_COREPLL 0
#define PRCI_CLK_DDRPLL 1
#define PRCI_CLK_GEMGXLPLL 2
#define PRCI_CLK_TLCLK 3
#endif /* HW_SIFIVE_U_PRCI_H */ #endif /* HW_SIFIVE_U_PRCI_H */