target/sh4: fix FPSCR cause vs flag inversion
The floating-point status/control register contains cause and flag bits. The cause bits are set to 0 before executing the instruction, while the flag bits hold the status of the exception generated after the field was last cleared. Message-Id: <20170702202814.27793-4-aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -219,29 +219,29 @@ static void update_fpscr(CPUSH4State *env, uintptr_t retaddr)
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xcpt = get_float_exception_flags(&env->fp_status);
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/* Clear the flag entries */
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env->fpscr &= ~FPSCR_FLAG_MASK;
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/* Clear the cause entries */
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env->fpscr &= ~FPSCR_CAUSE_MASK;
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if (unlikely(xcpt)) {
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if (xcpt & float_flag_invalid) {
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env->fpscr |= FPSCR_FLAG_V;
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env->fpscr |= FPSCR_CAUSE_V;
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}
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if (xcpt & float_flag_divbyzero) {
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env->fpscr |= FPSCR_FLAG_Z;
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env->fpscr |= FPSCR_CAUSE_Z;
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}
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if (xcpt & float_flag_overflow) {
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env->fpscr |= FPSCR_FLAG_O;
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env->fpscr |= FPSCR_CAUSE_O;
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}
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if (xcpt & float_flag_underflow) {
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env->fpscr |= FPSCR_FLAG_U;
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env->fpscr |= FPSCR_CAUSE_U;
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}
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if (xcpt & float_flag_inexact) {
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env->fpscr |= FPSCR_FLAG_I;
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env->fpscr |= FPSCR_CAUSE_I;
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}
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/* Accumulate in cause entries */
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env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
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<< (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
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/* Accumulate in flag entries */
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env->fpscr |= (env->fpscr & FPSCR_CAUSE_MASK)
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>> (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
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/* Generate an exception if enabled */
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cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
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