From 8009307031affdd0311750d9b5684f6d5a908ab9 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 20 Sep 2019 21:32:55 -0700 Subject: [PATCH] target/alpha: Mask IOV exception with INV for user-only MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The kernel masks the integer overflow exception with the software invalid exception mask. Include IOV in the set of exception bits masked by fpcr_exc_enable. Fixes the new float_convs test. Signed-off-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20190921043256.4575-7-richard.henderson@linaro.org> --- target/alpha/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 1b3479738b..55d7274d94 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -58,6 +58,13 @@ void cpu_alpha_store_fpcr(CPUAlphaState *env, uint64_t val) */ uint32_t soft_fpcr = alpha_ieee_swcr_to_fpcr(env->swcr) >> 32; fpcr |= soft_fpcr & (FPCR_STATUS_MASK | FPCR_DNZ); + + /* + * The IOV exception is disabled by the kernel with SWCR_TRAP_ENABLE_INV, + * which got mapped by alpha_ieee_swcr_to_fpcr to FPCR_INVD. + * Add FPCR_IOV to fpcr_exc_enable so that it is handled identically. + */ + t |= CONVERT_BIT(soft_fpcr, FPCR_INVD, FPCR_IOV); #endif t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE);