target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index
Free up the riscv_cpu_mmu_index name for other usage; emphasize that the argument is 'env'. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -498,7 +498,7 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env);
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void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen);
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bool riscv_cpu_vector_enabled(CPURISCVState *env);
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void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
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int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
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int riscv_env_mmu_index(CPURISCVState *env, bool ifetch);
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G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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@ -507,7 +507,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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bool probe, uintptr_t retaddr);
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char *riscv_isa_string(RISCVCPU *cpu);
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#define cpu_mmu_index riscv_cpu_mmu_index
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#define cpu_mmu_index riscv_env_mmu_index
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#ifndef CONFIG_USER_ONLY
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void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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@ -33,7 +33,7 @@
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#include "debug.h"
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#include "tcg/oversized-guest.h"
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int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
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int riscv_env_mmu_index(CPURISCVState *env, bool ifetch)
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{
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#ifdef CONFIG_USER_ONLY
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return 0;
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