linux-user/elfload: Fix /proc/cpuinfo features: on s390x

elf_hwcap_str() takes a bit number, but compares it for equality with
the HWCAP_S390_* masks. This causes /proc/cpuinfo to display incorrect
hwcaps.

Fix by introducing the HWCAP_S390_NR_* constants and using them in
elf_hwcap_str() instead of the HWCAP_S390_*. While at it, add the
missing nnpa, pcimio and sie hwcaps from the latest kernel.

Output before:

	features	: esan3 zarch stfle msa

Output after:

	features	: esan3 zarch stfle msa ldisp eimm etf3eh highgprs vx vxe

Fixes: e19807bee3 ("linux-user/elfload: Introduce elf_hwcap_str() on s390x")
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230627151356.273259-1-iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Ilya Leoshkevich 2023-06-27 17:13:33 +02:00 committed by Thomas Huth
parent d9458f990a
commit 7f114a5807
2 changed files with 69 additions and 38 deletions

View File

@ -596,25 +596,53 @@ typedef struct {
/* Bits present in AT_HWCAP for s390. */
#define HWCAP_S390_ESAN3 1
#define HWCAP_S390_ZARCH 2
#define HWCAP_S390_STFLE 4
#define HWCAP_S390_MSA 8
#define HWCAP_S390_LDISP 16
#define HWCAP_S390_EIMM 32
#define HWCAP_S390_DFP 64
#define HWCAP_S390_HPAGE 128
#define HWCAP_S390_ETF3EH 256
#define HWCAP_S390_HIGH_GPRS 512
#define HWCAP_S390_TE 1024
#define HWCAP_S390_VXRS 2048
#define HWCAP_S390_VXRS_BCD 4096
#define HWCAP_S390_VXRS_EXT 8192
#define HWCAP_S390_GS 16384
#define HWCAP_S390_VXRS_EXT2 32768
#define HWCAP_S390_VXRS_PDE 65536
#define HWCAP_S390_SORT 131072
#define HWCAP_S390_DFLT 262144
#define HWCAP_S390_NR_ESAN3 0
#define HWCAP_S390_NR_ZARCH 1
#define HWCAP_S390_NR_STFLE 2
#define HWCAP_S390_NR_MSA 3
#define HWCAP_S390_NR_LDISP 4
#define HWCAP_S390_NR_EIMM 5
#define HWCAP_S390_NR_DFP 6
#define HWCAP_S390_NR_HPAGE 7
#define HWCAP_S390_NR_ETF3EH 8
#define HWCAP_S390_NR_HIGH_GPRS 9
#define HWCAP_S390_NR_TE 10
#define HWCAP_S390_NR_VXRS 11
#define HWCAP_S390_NR_VXRS_BCD 12
#define HWCAP_S390_NR_VXRS_EXT 13
#define HWCAP_S390_NR_GS 14
#define HWCAP_S390_NR_VXRS_EXT2 15
#define HWCAP_S390_NR_VXRS_PDE 16
#define HWCAP_S390_NR_SORT 17
#define HWCAP_S390_NR_DFLT 18
#define HWCAP_S390_NR_VXRS_PDE2 19
#define HWCAP_S390_NR_NNPA 20
#define HWCAP_S390_NR_PCI_MIO 21
#define HWCAP_S390_NR_SIE 22
#define HWCAP_S390_ESAN3 (1 << HWCAP_S390_NR_ESAN3)
#define HWCAP_S390_ZARCH (1 << HWCAP_S390_NR_ZARCH)
#define HWCAP_S390_STFLE (1 << HWCAP_S390_NR_STFLE)
#define HWCAP_S390_MSA (1 << HWCAP_S390_NR_MSA)
#define HWCAP_S390_LDISP (1 << HWCAP_S390_NR_LDISP)
#define HWCAP_S390_EIMM (1 << HWCAP_S390_NR_EIMM)
#define HWCAP_S390_DFP (1 << HWCAP_S390_NR_DFP)
#define HWCAP_S390_HPAGE (1 << HWCAP_S390_NR_HPAGE)
#define HWCAP_S390_ETF3EH (1 << HWCAP_S390_NR_ETF3EH)
#define HWCAP_S390_HIGH_GPRS (1 << HWCAP_S390_NR_HIGH_GPRS)
#define HWCAP_S390_TE (1 << HWCAP_S390_NR_TE)
#define HWCAP_S390_VXRS (1 << HWCAP_S390_NR_VXRS)
#define HWCAP_S390_VXRS_BCD (1 << HWCAP_S390_NR_VXRS_BCD)
#define HWCAP_S390_VXRS_EXT (1 << HWCAP_S390_NR_VXRS_EXT)
#define HWCAP_S390_GS (1 << HWCAP_S390_NR_GS)
#define HWCAP_S390_VXRS_EXT2 (1 << HWCAP_S390_NR_VXRS_EXT2)
#define HWCAP_S390_VXRS_PDE (1 << HWCAP_S390_NR_VXRS_PDE)
#define HWCAP_S390_SORT (1 << HWCAP_S390_NR_SORT)
#define HWCAP_S390_DFLT (1 << HWCAP_S390_NR_DFLT)
#define HWCAP_S390_VXRS_PDE2 (1 << HWCAP_S390_NR_VXRS_PDE2)
#define HWCAP_S390_NNPA (1 << HWCAP_S390_NR_NNPA)
#define HWCAP_S390_PCI_MIO (1 << HWCAP_S390_NR_PCI_MIO)
#define HWCAP_S390_SIE (1 << HWCAP_S390_NR_SIE)
/* M68K specific definitions. */
/* We use the top 24 bits to encode information about the

View File

@ -1621,25 +1621,28 @@ uint32_t get_elf_hwcap(void)
const char *elf_hwcap_str(uint32_t bit)
{
static const char *hwcap_str[] = {
[HWCAP_S390_ESAN3] = "esan3",
[HWCAP_S390_ZARCH] = "zarch",
[HWCAP_S390_STFLE] = "stfle",
[HWCAP_S390_MSA] = "msa",
[HWCAP_S390_LDISP] = "ldisp",
[HWCAP_S390_EIMM] = "eimm",
[HWCAP_S390_DFP] = "dfp",
[HWCAP_S390_HPAGE] = "edat",
[HWCAP_S390_ETF3EH] = "etf3eh",
[HWCAP_S390_HIGH_GPRS] = "highgprs",
[HWCAP_S390_TE] = "te",
[HWCAP_S390_VXRS] = "vx",
[HWCAP_S390_VXRS_BCD] = "vxd",
[HWCAP_S390_VXRS_EXT] = "vxe",
[HWCAP_S390_GS] = "gs",
[HWCAP_S390_VXRS_EXT2] = "vxe2",
[HWCAP_S390_VXRS_PDE] = "vxp",
[HWCAP_S390_SORT] = "sort",
[HWCAP_S390_DFLT] = "dflt",
[HWCAP_S390_NR_ESAN3] = "esan3",
[HWCAP_S390_NR_ZARCH] = "zarch",
[HWCAP_S390_NR_STFLE] = "stfle",
[HWCAP_S390_NR_MSA] = "msa",
[HWCAP_S390_NR_LDISP] = "ldisp",
[HWCAP_S390_NR_EIMM] = "eimm",
[HWCAP_S390_NR_DFP] = "dfp",
[HWCAP_S390_NR_HPAGE] = "edat",
[HWCAP_S390_NR_ETF3EH] = "etf3eh",
[HWCAP_S390_NR_HIGH_GPRS] = "highgprs",
[HWCAP_S390_NR_TE] = "te",
[HWCAP_S390_NR_VXRS] = "vx",
[HWCAP_S390_NR_VXRS_BCD] = "vxd",
[HWCAP_S390_NR_VXRS_EXT] = "vxe",
[HWCAP_S390_NR_GS] = "gs",
[HWCAP_S390_NR_VXRS_EXT2] = "vxe2",
[HWCAP_S390_NR_VXRS_PDE] = "vxp",
[HWCAP_S390_NR_SORT] = "sort",
[HWCAP_S390_NR_DFLT] = "dflt",
[HWCAP_S390_NR_NNPA] = "nnpa",
[HWCAP_S390_NR_PCI_MIO] = "pcimio",
[HWCAP_S390_NR_SIE] = "sie",
};
return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;