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hw/arm/sbsa-ref: switch to 1GHz timer frequency

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Updated firmware for QEMU CI is already in merge queue so we can move
platform to be future proof.

All supported cpus work fine with 1GHz timer frequency when firmware is
fresh enough.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Message-id: 20240531093729.220758-2-marcin.juszkiewicz@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Marcin Juszkiewicz 2024-06-18 16:22:20 +01:00 committed by Peter Maydell
parent 35e71ec535
commit 7edca16e74
1 changed files with 4 additions and 8 deletions
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12
hw/arm/sbsa-ref.c
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@ -62,16 +62,12 @@
/*
* Generic timer frequency in Hz (which drives both the CPU generic timers
* and the SBSA watchdog-timer). Older versions of the TF-A firmware
* typically used with sbsa-ref (including the binaries in our Avocado test
* Aarch64SbsarefMachine.test_sbsaref_alpine_linux_max_pauth_impdef
* assume it is this value.
* and the SBSA watchdog-timer). Older (<2.11) versions of the TF-A firmware
* assumed 62.5MHz here.
*
* TODO: this value is not architecturally correct for an Armv8.6 or
* better CPU, so we should move to 1GHz once the TF-A fix above has
* made it into a release and into our Avocado test.
* Starting with Armv8.6 CPU 1GHz timer frequency is mandated.
*/
#define SBSA_GTIMER_HZ 62500000
#define SBSA_GTIMER_HZ 1000000000
enum {
SBSA_FLASH,