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hw/arm/xilinx_zynq: Add boot-mode property 

Read boot-mode value as machine property and propagate that to
SLCR.BOOT_MODE register.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20240621125906.1300995-3-sai.pavan.boddu@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Sai Pavan Boddu 2024-06-21 18:29:05 +05:30 committed by Peter Maydell
parent 247f24507f
commit 7df3747c92
1 changed files with 31 additions and 0 deletions
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31
hw/arm/xilinx_zynq.c
View File

@ -38,6 +38,7 @@
#include "qom/object.h"
#include "exec/tswap.h"
#include "target/arm/cpu-qom.h"
#include "qapi/visitor.h"
#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
@ -90,6 +91,7 @@ struct ZynqMachineState {
MachineState parent;
Clock *ps_clk;
ARMCPU *cpu[ZYNQ_MAX_CPUS];
uint8_t boot_mode;
};
static void zynq_write_board_setup(ARMCPU *cpu,
@ -176,6 +178,27 @@ static inline int zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq,
return unit;
}
static void zynq_set_boot_mode(Object *obj, const char *str,
Error **errp)
{
ZynqMachineState *m = ZYNQ_MACHINE(obj);
uint8_t mode = 0;
if (!strncasecmp(str, "qspi", 4)) {
mode = 1;
} else if (!strncasecmp(str, "sd", 2)) {
mode = 5;
} else if (!strncasecmp(str, "nor", 3)) {
mode = 2;
} else if (!strncasecmp(str, "jtag", 4)) {
mode = 0;
} else {
error_setg(errp, "%s boot mode not supported", str);
return;
}
m->boot_mode = mode;
}
static void zynq_init(MachineState *machine)
{
ZynqMachineState *zynq_machine = ZYNQ_MACHINE(machine);
@ -241,6 +264,7 @@ static void zynq_init(MachineState *machine)
/* Create slcr, keep a pointer to connect clocks */
slcr = qdev_new("xilinx-zynq_slcr");
qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk);
qdev_prop_set_uint8(slcr, "boot-mode", zynq_machine->boot_mode);
sysbus_realize_and_unref(SYS_BUS_DEVICE(slcr), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000);
@ -373,6 +397,7 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data)
NULL
};
MachineClass *mc = MACHINE_CLASS(oc);
ObjectProperty *prop;
mc->desc = "Xilinx Zynq Platform Baseboard for Cortex-A9";
mc->init = zynq_init;
mc->max_cpus = ZYNQ_MAX_CPUS;
@ -380,6 +405,12 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data)
mc->ignore_memory_transaction_failures = true;
mc->valid_cpu_types = valid_cpu_types;
mc->default_ram_id = "zynq.ext_ram";
prop = object_class_property_add_str(oc, "boot-mode", NULL,
zynq_set_boot_mode);
object_class_property_set_description(oc, "boot-mode",
"Supported boot modes:"
" jtag qspi sd nor");
object_property_set_default_str(prop, "qspi");
}
static const TypeInfo zynq_machine_type = {