target-s390: Convert SET SYSTEM MASK
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -383,4 +383,6 @@
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/* We only do 64-bit, so accept this as a no-op.
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/* We only do 64-bit, so accept this as a no-op.
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Let SAM24 and SAM31 signal illegal instruction. */
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Let SAM24 and SAM31 signal illegal instruction. */
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C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0)
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C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0)
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/* SET SYSTEM MASK */
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C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0)
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#endif /* CONFIG_USER_ONLY */
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#endif /* CONFIG_USER_ONLY */
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@ -2356,22 +2356,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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switch (opc) {
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switch (opc) {
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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case 0x80: /* SSM D2(B2) [S] */
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/* Set System Mask */
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check_privileged(s);
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insn = ld_code4(env, s->pc);
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decode_rs(s, insn, &r1, &r3, &b2, &d2);
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tmp = get_address(s, 0, b2, d2);
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tmp2 = tcg_temp_new_i64();
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tmp3 = tcg_temp_new_i64();
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tcg_gen_andi_i64(tmp3, psw_mask, ~0xff00000000000000ULL);
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tcg_gen_qemu_ld8u(tmp2, tmp, get_mem_index(s));
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tcg_gen_shli_i64(tmp2, tmp2, 56);
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tcg_gen_or_i64(psw_mask, tmp3, tmp2);
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i64(tmp3);
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break;
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case 0x82: /* LPSW D2(B2) [S] */
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case 0x82: /* LPSW D2(B2) [S] */
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/* Load PSW */
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/* Load PSW */
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check_privileged(s);
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check_privileged(s);
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@ -3607,6 +3591,15 @@ static ExitStatus op_ori(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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#ifndef CONFIG_USER_ONLY
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static ExitStatus op_ssm(DisasContext *s, DisasOps *o)
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{
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check_privileged(s);
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tcg_gen_deposit_i64(psw_mask, psw_mask, o->in2, 56, 8);
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return NO_EXIT;
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}
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#endif
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static ExitStatus op_st8(DisasContext *s, DisasOps *o)
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static ExitStatus op_st8(DisasContext *s, DisasOps *o)
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{
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{
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tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s));
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tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s));
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