hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array
The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used three times: - When the timer expires and not in bypass mode - On a read access (on invalid command). - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. pflash_register_memory(rom_mode=true) already sets the ROM device in "read array" mode (from I/O device to ROM one). Explicit that by renaming the function as pflash_mode_read_array(), adding a trace event and resetting wcycle. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210310170528.1184868-7-philmd@redhat.com>
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@ -184,10 +184,13 @@ static void pflash_setup_mappings(PFlashCFI02 *pfl)
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pfl->rom_mode = true;
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pfl->rom_mode = true;
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}
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}
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static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode)
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static void pflash_mode_read_array(PFlashCFI02 *pfl)
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{
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{
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memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode);
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trace_pflash_mode_read_array();
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pfl->rom_mode = !!rom_mode;
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pfl->cmd = 0x00;
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pfl->wcycle = 0;
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pfl->rom_mode = true;
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memory_region_rom_device_set_romd(&pfl->orig_mem, true);
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}
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}
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static size_t pflash_regions_count(PFlashCFI02 *pfl)
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static size_t pflash_regions_count(PFlashCFI02 *pfl)
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@ -249,11 +252,10 @@ static void pflash_timer(void *opaque)
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toggle_dq7(pfl);
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toggle_dq7(pfl);
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if (pfl->bypass) {
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if (pfl->bypass) {
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pfl->wcycle = 2;
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pfl->wcycle = 2;
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} else {
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pflash_register_memory(pfl, 1);
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pfl->wcycle = 0;
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}
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pfl->cmd = 0;
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pfl->cmd = 0;
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} else {
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pflash_mode_read_array(pfl);
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}
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}
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}
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/*
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/*
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@ -315,7 +317,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset, unsigned int width)
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/* Lazy reset to ROMD mode after a certain amount of read accesses */
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/* Lazy reset to ROMD mode after a certain amount of read accesses */
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if (!pfl->rom_mode && pfl->wcycle == 0 &&
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if (!pfl->rom_mode && pfl->wcycle == 0 &&
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++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) {
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++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) {
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pflash_register_memory(pfl, 1);
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pflash_mode_read_array(pfl);
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}
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}
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offset &= pfl->chip_len - 1;
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offset &= pfl->chip_len - 1;
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boff = offset & 0xFF;
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boff = offset & 0xFF;
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@ -933,8 +935,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);
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timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl);
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timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl);
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pfl->wcycle = 0;
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pfl->cmd = 0;
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pfl->status = 0;
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pfl->status = 0;
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pflash_cfi02_fill_cfi_table(pfl, nb_regions);
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pflash_cfi02_fill_cfi_table(pfl, nb_regions);
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@ -7,6 +7,7 @@ fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x"
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# pflash_cfi01.c
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# pflash_cfi01.c
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# pflash_cfi02.c
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# pflash_cfi02.c
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pflash_reset(void) "reset"
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pflash_reset(void) "reset"
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pflash_mode_read_array(void) "mode: read array"
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pflash_timer_expired(uint8_t cmd) "command 0x%02x done"
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pflash_timer_expired(uint8_t cmd) "command 0x%02x done"
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pflash_io_read(uint64_t offset, unsigned size, uint32_t value, uint8_t cmd, uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x cmd:0x%02x wcycle:%u"
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pflash_io_read(uint64_t offset, unsigned size, uint32_t value, uint8_t cmd, uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x cmd:0x%02x wcycle:%u"
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pflash_io_write(uint64_t offset, unsigned size, uint32_t value, uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x wcycle:%u"
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pflash_io_write(uint64_t offset, unsigned size, uint32_t value, uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x wcycle:%u"
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