linux-user: Add strace support for printing arguments of truncate()/ftruncate() and getsid()
This patch implements strace argument printing functionality for following syscalls: * truncate, ftruncate - truncate a file to a specified length int truncate/truncate64(const char *path, off_t length) int ftruncate/ftruncate64(int fd, off_t length) man page: https://man7.org/linux/man-pages/man2/truncate.2.html * getsid - get session ID pid_t getsid(pid_t pid) man page: https://man7.org/linux/man-pages/man2/getsid.2.html Implementation notes: Syscalls truncate/truncate64 take string argument types and thus a separate print function "print_truncate/print_truncate64" is stated in file "strace.list". This function is defined and implemented in "strace.c" by using an existing function used to print string arguments: "print_string()". For syscall ftruncate64, a separate printing function was also stated in "strace.c" as it requires a special kind of handling. The other syscalls have only primitive argument types, so the rest of the implementation was handled by stating an appropriate printing format in file "strace.list". Function "regpairs_aligned()" was cut & pasted from "syscall.c" to "qemu.h" as it is used by functions "print_truncate64()" and "print_ftruncate64()" to print the offset arguments of "truncate64()" and "ftruncate64()". Signed-off-by: Filip Bozuta <Filip.Bozuta@syrmia.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200811164553.27713-3-Filip.Bozuta@syrmia.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@ -706,6 +706,41 @@ static inline uint64_t target_offset64(uint64_t word0, uint64_t word1)
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}
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#endif /* TARGET_ABI_BITS != 32 */
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/* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
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#ifdef TARGET_ARM
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static inline int regpairs_aligned(void *cpu_env, int num)
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{
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return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
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}
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#elif defined(TARGET_MIPS) && (TARGET_ABI_BITS == 32)
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static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
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#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
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/*
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* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
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* of registers which translates to the same as ARM/MIPS, because we start with
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* r3 as arg1
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*/
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static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
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#elif defined(TARGET_SH4)
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/* SH4 doesn't align register pairs, except for p{read,write}64 */
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static inline int regpairs_aligned(void *cpu_env, int num)
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{
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switch (num) {
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case TARGET_NR_pread64:
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case TARGET_NR_pwrite64:
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return 1;
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default:
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return 0;
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}
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}
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#elif defined(TARGET_XTENSA)
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static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
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#else
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static inline int regpairs_aligned(void *cpu_env, int num) { return 0; }
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#endif
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/**
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* preexit_cleanup: housekeeping before the guest exits
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*
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@ -1962,6 +1962,53 @@ print_lseek(void *cpu_env, const struct syscallname *name,
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}
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#endif
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#ifdef TARGET_NR_truncate
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static void
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print_truncate(void *cpu_env, const struct syscallname *name,
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abi_long arg0, abi_long arg1, abi_long arg2,
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abi_long arg3, abi_long arg4, abi_long arg5)
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{
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print_syscall_prologue(name);
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print_string(arg0, 0);
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print_raw_param(TARGET_ABI_FMT_ld, arg1, 1);
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print_syscall_epilogue(name);
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}
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#endif
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#ifdef TARGET_NR_truncate64
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static void
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print_truncate64(void *cpu_env, const struct syscallname *name,
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abi_long arg0, abi_long arg1, abi_long arg2,
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abi_long arg3, abi_long arg4, abi_long arg5)
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{
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print_syscall_prologue(name);
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print_string(arg0, 0);
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if (regpairs_aligned(cpu_env, TARGET_NR_truncate64)) {
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arg1 = arg2;
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arg2 = arg3;
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}
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print_raw_param("%" PRIu64, target_offset64(arg1, arg2), 1);
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print_syscall_epilogue(name);
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}
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#endif
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#ifdef TARGET_NR_ftruncate64
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static void
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print_ftruncate64(void *cpu_env, const struct syscallname *name,
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abi_long arg0, abi_long arg1, abi_long arg2,
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abi_long arg3, abi_long arg4, abi_long arg5)
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{
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print_syscall_prologue(name);
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print_raw_param("%d", arg0, 0);
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if (regpairs_aligned(cpu_env, TARGET_NR_ftruncate64)) {
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arg1 = arg2;
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arg2 = arg3;
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}
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print_raw_param("%" PRIu64, target_offset64(arg1, arg2), 1);
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print_syscall_epilogue(name);
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}
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#endif
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#if defined(TARGET_NR_socket)
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static void
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print_socket(void *cpu_env, const struct syscallname *name,
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@ -258,10 +258,10 @@
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{ TARGET_NR_ftime, "ftime" , NULL, NULL, NULL },
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#endif
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#ifdef TARGET_NR_ftruncate
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{ TARGET_NR_ftruncate, "ftruncate" , NULL, NULL, NULL },
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{ TARGET_NR_ftruncate, "ftruncate" , "%s(%d," TARGET_ABI_FMT_ld ")", NULL, NULL },
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#endif
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#ifdef TARGET_NR_ftruncate64
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{ TARGET_NR_ftruncate64, "ftruncate64" , NULL, NULL, NULL },
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{ TARGET_NR_ftruncate64, "ftruncate64" , NULL, print_ftruncate64, NULL },
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#endif
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#ifdef TARGET_NR_futex
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{ TARGET_NR_futex, "futex" , NULL, print_futex, NULL },
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@ -372,7 +372,7 @@
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{ TARGET_NR_getrusage, "getrusage" , NULL, NULL, NULL },
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#endif
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#ifdef TARGET_NR_getsid
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{ TARGET_NR_getsid, "getsid" , NULL, NULL, NULL },
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{ TARGET_NR_getsid, "getsid" , "%s(%d)", NULL, NULL },
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#endif
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#ifdef TARGET_NR_getsockname
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{ TARGET_NR_getsockname, "getsockname" , NULL, NULL, NULL },
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@ -1535,10 +1535,10 @@
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{ TARGET_NR_tkill, "tkill" , NULL, print_tkill, NULL },
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#endif
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#ifdef TARGET_NR_truncate
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{ TARGET_NR_truncate, "truncate" , NULL, NULL, NULL },
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{ TARGET_NR_truncate, "truncate" , NULL, print_truncate, NULL },
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#endif
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#ifdef TARGET_NR_truncate64
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{ TARGET_NR_truncate64, "truncate64" , NULL, NULL, NULL },
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{ TARGET_NR_truncate64, "truncate64" , NULL, print_truncate64, NULL },
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#endif
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#ifdef TARGET_NR_tuxcall
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{ TARGET_NR_tuxcall, "tuxcall" , NULL, NULL, NULL },
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@ -495,38 +495,6 @@ static inline int next_free_host_timer(void)
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}
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#endif
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/* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
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#ifdef TARGET_ARM
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static inline int regpairs_aligned(void *cpu_env, int num)
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{
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return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
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}
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#elif defined(TARGET_MIPS) && (TARGET_ABI_BITS == 32)
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static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
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#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
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/* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
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* of registers which translates to the same as ARM/MIPS, because we start with
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* r3 as arg1 */
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static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
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#elif defined(TARGET_SH4)
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/* SH4 doesn't align register pairs, except for p{read,write}64 */
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static inline int regpairs_aligned(void *cpu_env, int num)
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{
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switch (num) {
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case TARGET_NR_pread64:
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case TARGET_NR_pwrite64:
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return 1;
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default:
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return 0;
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}
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}
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#elif defined(TARGET_XTENSA)
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static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
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#else
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static inline int regpairs_aligned(void *cpu_env, int num) { return 0; }
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#endif
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#define ERRNO_TABLE_SIZE 1200
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/* target_to_host_errno_table[] is initialized from
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