aspeed queue :
* Performance improvement with Object class caching * Serial Flash Discovery Parameters support for m25p80 device * Various small adjustments on intructions and models -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmNX/WEACgkQUaNDx8/7 7KFhERAAhrcLcv15ny8RwatHPjzU00ZPQ0PcxGj1VDT66pCVh6M+rIeRPB2scOey Pu8jUvIYJ8w7ozjAP6YTQ1MP/WufniVi91Bx+vs/okSiWZa4dP0/G7NQWoc1at0s NBlkg57l1GMEeQb5x8vC1DizTQ1Z8Q8J/Ur3uXukXCmYVJAwHYpl/Foob1IPFgh8 UcJ55LyuRq99lS8ib6HvRftAsC3DOcA/sl3b/TYR2+iKyi1VS2aZoQzxVCavSBcz PoTonT9O4OvIQthAgXRwpylW/aMYU3I7FeyOMKlCNLbmJ8LpVbX2v0KN3WBvWBv4 OWP0DiqPUuoWFHLUGKbiVOgWQrTQXZyoD70SD/ObE1oMTLmeBoD1oFizQDvokHAR g2+gMdWnuWcbyaofY7YwuI6qz22gbrgh8JqX6sEWRDnY7HgCUvPhCsmci+bdN5cf dGcE8YKi7aD5gzoU9LRziPlhbwaEsgYLpYS7aGfNcmypgeq6lmNG7xKyw911zCTY uqDZWOUJy0tUIUTxoz3o1/KtsTFugjuZ+9W1SxELptJR37iwlP1vumf6bduwcx/3 ba8tzNoXecXO5Icmq5P3lMNVM/abpkDDKS66HA87mABLEd/eCD0ojR9Kfxo0mD74 kmQK3MFfJPkTu0ddu1cWhCIgTO7EuLuZL7gzj1oxoeXiU3YcVh8= =u7pS -----END PGP SIGNATURE----- Merge tag 'pull-aspeed-20221025' of https://github.com/legoater/qemu into staging aspeed queue : * Performance improvement with Object class caching * Serial Flash Discovery Parameters support for m25p80 device * Various small adjustments on intructions and models # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmNX/WEACgkQUaNDx8/7 # 7KFhERAAhrcLcv15ny8RwatHPjzU00ZPQ0PcxGj1VDT66pCVh6M+rIeRPB2scOey # Pu8jUvIYJ8w7ozjAP6YTQ1MP/WufniVi91Bx+vs/okSiWZa4dP0/G7NQWoc1at0s # NBlkg57l1GMEeQb5x8vC1DizTQ1Z8Q8J/Ur3uXukXCmYVJAwHYpl/Foob1IPFgh8 # UcJ55LyuRq99lS8ib6HvRftAsC3DOcA/sl3b/TYR2+iKyi1VS2aZoQzxVCavSBcz # PoTonT9O4OvIQthAgXRwpylW/aMYU3I7FeyOMKlCNLbmJ8LpVbX2v0KN3WBvWBv4 # OWP0DiqPUuoWFHLUGKbiVOgWQrTQXZyoD70SD/ObE1oMTLmeBoD1oFizQDvokHAR # g2+gMdWnuWcbyaofY7YwuI6qz22gbrgh8JqX6sEWRDnY7HgCUvPhCsmci+bdN5cf # dGcE8YKi7aD5gzoU9LRziPlhbwaEsgYLpYS7aGfNcmypgeq6lmNG7xKyw911zCTY # uqDZWOUJy0tUIUTxoz3o1/KtsTFugjuZ+9W1SxELptJR37iwlP1vumf6bduwcx/3 # ba8tzNoXecXO5Icmq5P3lMNVM/abpkDDKS66HA87mABLEd/eCD0ojR9Kfxo0mD74 # kmQK3MFfJPkTu0ddu1cWhCIgTO7EuLuZL7gzj1oxoeXiU3YcVh8= # =u7pS # -----END PGP SIGNATURE----- # gpg: Signature made Tue 25 Oct 2022 11:14:41 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20221025' of https://github.com/legoater/qemu: arm/aspeed: Replace mx25l25635e chip model m25p80: Add the w25q01jvq SFPD table m25p80: Add the w25q512jv SFPD table m25p80: Add the w25q256 SFPD table m25p80: Add the mx66l1g45g SFDP table m25p80: Add the mx25l25635f SFPD table m25p80: Add the mx25l25635e SFPD table m25p80: Add erase size for mx25l25635e m25p80: Add the n25q256a SFDP table m25p80: Add basic support for the SFDP command hw/arm/aspeed: increase Bletchley memory size ast2600: Drop NEON from the CPU features aspeed/smc: Cache AspeedSMCClass ssi: cache SSIPeripheralClass to avoid GET_CLASS() tests/avocado/machine_aspeed.py: Fix typos on buildroot hw/i2c/aspeed: Fix old reg slave receive Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi
commit
7c02614ec9
@ -1915,7 +1915,7 @@ SSI
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M: Alistair Francis <alistair@alistair23.me>
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S: Maintained
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F: hw/ssi/*
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F: hw/block/m25p80.c
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F: hw/block/m25p80*
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F: include/hw/ssi/ssi.h
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X: hw/ssi/xilinx_*
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F: tests/qtest/m25p80-test.c
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@ -1099,7 +1099,7 @@ static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
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amc->soc_name = "ast2400-a1";
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amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
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amc->fmc_model = "n25q256a";
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amc->spi_model = "mx25l25635e";
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amc->spi_model = "mx25l25635f";
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amc->num_cs = 1;
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amc->i2c_init = palmetto_bmc_i2c_init;
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mc->default_ram_size = 256 * MiB;
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@ -1150,7 +1150,7 @@ static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
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amc->soc_name = "ast2500-a1";
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amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
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amc->fmc_model = "mx25l25635e";
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amc->spi_model = "mx25l25635e";
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amc->spi_model = "mx25l25635f";
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amc->num_cs = 1;
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amc->i2c_init = ast2500_evb_i2c_init;
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mc->default_ram_size = 512 * MiB;
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@ -1200,7 +1200,7 @@ static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
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mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
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amc->soc_name = "ast2500-a1";
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amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
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amc->fmc_model = "mx25l25635e";
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amc->fmc_model = "mx25l25635f";
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amc->spi_model = "mx66l1g45g";
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amc->num_cs = 2;
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amc->i2c_init = witherspoon_bmc_i2c_init;
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@ -1330,6 +1330,13 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
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aspeed_soc_num_cpus(amc->soc_name);
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};
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/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
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#if HOST_LONG_BITS == 32
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#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
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#else
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#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
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#endif
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static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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@ -1344,7 +1351,7 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
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amc->num_cs = 2;
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amc->macs_mask = ASPEED_MAC2_ON;
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amc->i2c_init = bletchley_bmc_i2c_init;
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mc->default_ram_size = 512 * MiB;
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mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
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mc->default_cpus = mc->min_cpus = mc->max_cpus =
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aspeed_soc_num_cpus(amc->soc_name);
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}
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@ -307,6 +307,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
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object_property_set_int(OBJECT(&s->cpu[i]), "cntfrq", 1125000000,
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&error_abort);
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object_property_set_bool(OBJECT(&s->cpu[i]), "neon", false,
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&error_abort);
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object_property_set_link(OBJECT(&s->cpu[i]), "memory",
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OBJECT(s->memory), &error_abort);
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@ -35,6 +35,7 @@
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#include "qapi/error.h"
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#include "trace.h"
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#include "qom/object.h"
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#include "m25p80_sfdp.h"
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/* 16 MiB max in 3 byte address mode */
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#define MAX_3BYTES_SIZE 0x1000000
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@ -72,6 +73,7 @@ typedef struct FlashPartInfo {
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* This field inform how many die is in the chip.
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*/
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uint8_t die_cnt;
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uint8_t (*sfdp_read)(uint32_t sfdp_addr);
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} FlashPartInfo;
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/* adapted from linux */
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@ -230,12 +232,16 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("mx25l6405d", 0xc22017, 0, 64 << 10, 128, 0) },
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{ INFO("mx25l12805d", 0xc22018, 0, 64 << 10, 256, 0) },
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{ INFO("mx25l12855e", 0xc22618, 0, 64 << 10, 256, 0) },
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{ INFO6("mx25l25635e", 0xc22019, 0xc22019, 64 << 10, 512, 0) },
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{ INFO6("mx25l25635e", 0xc22019, 0xc22019, 64 << 10, 512,
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ER_4K | ER_32K), .sfdp_read = m25p80_sfdp_mx25l25635e },
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{ INFO6("mx25l25635f", 0xc22019, 0xc22019, 64 << 10, 512,
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ER_4K | ER_32K), .sfdp_read = m25p80_sfdp_mx25l25635f },
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{ INFO("mx25l25655e", 0xc22619, 0, 64 << 10, 512, 0) },
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{ INFO("mx66l51235f", 0xc2201a, 0, 64 << 10, 1024, ER_4K | ER_32K) },
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{ INFO("mx66u51235f", 0xc2253a, 0, 64 << 10, 1024, ER_4K | ER_32K) },
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{ INFO("mx66u1g45g", 0xc2253b, 0, 64 << 10, 2048, ER_4K | ER_32K) },
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{ INFO("mx66l1g45g", 0xc2201b, 0, 64 << 10, 2048, ER_4K | ER_32K) },
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{ INFO("mx66l1g45g", 0xc2201b, 0, 64 << 10, 2048, ER_4K | ER_32K),
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.sfdp_read = m25p80_sfdp_mx66l1g45g },
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/* Micron */
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{ INFO("n25q032a11", 0x20bb16, 0, 64 << 10, 64, ER_4K) },
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@ -245,13 +251,15 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("n25q128a11", 0x20bb18, 0, 64 << 10, 256, ER_4K) },
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{ INFO("n25q128a13", 0x20ba18, 0, 64 << 10, 256, ER_4K) },
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{ INFO("n25q256a11", 0x20bb19, 0, 64 << 10, 512, ER_4K) },
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{ INFO("n25q256a13", 0x20ba19, 0, 64 << 10, 512, ER_4K) },
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{ INFO("n25q256a13", 0x20ba19, 0, 64 << 10, 512, ER_4K),
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.sfdp_read = m25p80_sfdp_n25q256a },
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{ INFO("n25q512a11", 0x20bb20, 0, 64 << 10, 1024, ER_4K) },
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{ INFO("n25q512a13", 0x20ba20, 0, 64 << 10, 1024, ER_4K) },
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{ INFO("n25q128", 0x20ba18, 0, 64 << 10, 256, 0) },
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{ INFO("n25q256a", 0x20ba19, 0, 64 << 10, 512,
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ER_4K | HAS_SR_BP3_BIT6 | HAS_SR_TB) },
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{ INFO("n25q512a", 0x20ba20, 0, 64 << 10, 1024, ER_4K) },
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ER_4K | HAS_SR_BP3_BIT6 | HAS_SR_TB),
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.sfdp_read = m25p80_sfdp_n25q256a },
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{ INFO("n25q512a", 0x20ba20, 0, 64 << 10, 1024, ER_4K) },
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{ INFO("n25q512ax3", 0x20ba20, 0x1000, 64 << 10, 1024, ER_4K) },
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{ INFO("mt25ql512ab", 0x20ba20, 0x1044, 64 << 10, 1024, ER_4K | ER_32K) },
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{ INFO_STACKED("mt35xu01g", 0x2c5b1b, 0x104100, 128 << 10, 1024,
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@ -337,9 +345,12 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("w25q64", 0xef4017, 0, 64 << 10, 128, ER_4K) },
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{ INFO("w25q80", 0xef5014, 0, 64 << 10, 16, ER_4K) },
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{ INFO("w25q80bl", 0xef4014, 0, 64 << 10, 16, ER_4K) },
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{ INFO("w25q256", 0xef4019, 0, 64 << 10, 512, ER_4K) },
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{ INFO("w25q512jv", 0xef4020, 0, 64 << 10, 1024, ER_4K) },
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{ INFO("w25q01jvq", 0xef4021, 0, 64 << 10, 2048, ER_4K) },
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{ INFO("w25q256", 0xef4019, 0, 64 << 10, 512, ER_4K),
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.sfdp_read = m25p80_sfdp_w25q256 },
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{ INFO("w25q512jv", 0xef4020, 0, 64 << 10, 1024, ER_4K),
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.sfdp_read = m25p80_sfdp_w25q512jv },
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{ INFO("w25q01jvq", 0xef4021, 0, 64 << 10, 2048, ER_4K),
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.sfdp_read = m25p80_sfdp_w25q01jvq },
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};
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typedef enum {
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@ -355,6 +366,7 @@ typedef enum {
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BULK_ERASE = 0xc7,
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READ_FSR = 0x70,
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RDCR = 0x15,
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RDSFDP = 0x5a,
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READ = 0x03,
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READ4 = 0x13,
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@ -421,6 +433,7 @@ typedef enum {
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STATE_COLLECTING_DATA,
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STATE_COLLECTING_VAR_LEN_DATA,
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STATE_READING_DATA,
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STATE_READING_SFDP,
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} CMDState;
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typedef enum {
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@ -679,6 +692,8 @@ static inline int get_addr_length(Flash *s)
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}
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switch (s->cmd_in_progress) {
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case RDSFDP:
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return 3;
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case PP4:
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case PP4_4:
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case QPP_4:
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@ -823,6 +838,11 @@ static void complete_collecting_data(Flash *s)
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" by device\n");
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}
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break;
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case RDSFDP:
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s->state = STATE_READING_SFDP;
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break;
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default:
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break;
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}
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@ -1431,6 +1451,16 @@ static void decode_new_cmd(Flash *s, uint32_t value)
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qemu_log_mask(LOG_GUEST_ERROR, "M25P80: Unknown cmd %x\n", value);
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}
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break;
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case RDSFDP:
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if (s->pi->sfdp_read) {
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s->needed_bytes = get_addr_length(s) + 1; /* SFDP addr + dummy */
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s->pos = 0;
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s->len = 0;
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s->state = STATE_COLLECTING_DATA;
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break;
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}
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/* Fallthrough */
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default:
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s->pos = 0;
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s->len = 1;
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@ -1538,6 +1568,12 @@ static uint32_t m25p80_transfer8(SSIPeripheral *ss, uint32_t tx)
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}
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}
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break;
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case STATE_READING_SFDP:
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assert(s->pi->sfdp_read);
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r = s->pi->sfdp_read(s->cur_addr);
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trace_m25p80_read_sfdp(s, s->cur_addr, (uint8_t)r);
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s->cur_addr = (s->cur_addr + 1) & (M25P80_SFDP_MAX_SIZE - 1);
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break;
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default:
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case STATE_IDLE:
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332
hw/block/m25p80_sfdp.c
Normal file
332
hw/block/m25p80_sfdp.c
Normal file
@ -0,0 +1,332 @@
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/*
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* M25P80 Serial Flash Discoverable Parameter (SFDP)
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*
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* Copyright (c) 2020, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/host-utils.h"
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#include "m25p80_sfdp.h"
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#define define_sfdp_read(model) \
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uint8_t m25p80_sfdp_##model(uint32_t addr) \
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{ \
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assert(is_power_of_2(sizeof(sfdp_##model))); \
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return sfdp_##model[addr & (sizeof(sfdp_##model) - 1)]; \
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}
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/*
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* Micron
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*/
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static const uint8_t sfdp_n25q256a[] = {
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0x53, 0x46, 0x44, 0x50, 0x00, 0x01, 0x00, 0xff,
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0x00, 0x00, 0x01, 0x09, 0x30, 0x00, 0x00, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xe5, 0x20, 0xfb, 0xff, 0xff, 0xff, 0xff, 0x0f,
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0x29, 0xeb, 0x27, 0x6b, 0x08, 0x3b, 0x27, 0xbb,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x27, 0xbb,
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0xff, 0xff, 0x29, 0xeb, 0x0c, 0x20, 0x10, 0xd8,
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0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(n25q256a);
|
||||
|
||||
|
||||
/*
|
||||
* Matronix
|
||||
*/
|
||||
|
||||
/* mx25l25635e. No 4B opcodes */
|
||||
static const uint8_t sfdp_mx25l25635e[] = {
|
||||
0x53, 0x46, 0x44, 0x50, 0x00, 0x01, 0x01, 0xff,
|
||||
0x00, 0x00, 0x01, 0x09, 0x30, 0x00, 0x00, 0xff,
|
||||
0xc2, 0x00, 0x01, 0x04, 0x60, 0x00, 0x00, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xe5, 0x20, 0xf3, 0xff, 0xff, 0xff, 0xff, 0x0f,
|
||||
0x44, 0xeb, 0x08, 0x6b, 0x08, 0x3b, 0x04, 0xbb,
|
||||
0xee, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xff,
|
||||
0xff, 0xff, 0x00, 0xff, 0x0c, 0x20, 0x0f, 0x52,
|
||||
0x10, 0xd8, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0x00, 0x36, 0x00, 0x27, 0xf7, 0x4f, 0xff, 0xff,
|
||||
0xd9, 0xc8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(mx25l25635e)
|
||||
|
||||
static const uint8_t sfdp_mx25l25635f[] = {
|
||||
0x53, 0x46, 0x44, 0x50, 0x00, 0x01, 0x01, 0xff,
|
||||
0x00, 0x00, 0x01, 0x09, 0x30, 0x00, 0x00, 0xff,
|
||||
0xc2, 0x00, 0x01, 0x04, 0x60, 0x00, 0x00, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xe5, 0x20, 0xf3, 0xff, 0xff, 0xff, 0xff, 0x0f,
|
||||
0x44, 0xeb, 0x08, 0x6b, 0x08, 0x3b, 0x04, 0xbb,
|
||||
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xff,
|
||||
0xff, 0xff, 0x44, 0xeb, 0x0c, 0x20, 0x0f, 0x52,
|
||||
0x10, 0xd8, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0x00, 0x36, 0x00, 0x27, 0x9d, 0xf9, 0xc0, 0x64,
|
||||
0x85, 0xcb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xc2, 0xf5, 0x08, 0x0a,
|
||||
0x08, 0x04, 0x03, 0x06, 0x00, 0x00, 0x07, 0x29,
|
||||
0x17, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(mx25l25635f);
|
||||
|
||||
static const uint8_t sfdp_mx66l1g45g[] = {
|
||||
0x53, 0x46, 0x44, 0x50, 0x06, 0x01, 0x02, 0xff,
|
||||
0x00, 0x06, 0x01, 0x10, 0x30, 0x00, 0x00, 0xff,
|
||||
0xc2, 0x00, 0x01, 0x04, 0x10, 0x01, 0x00, 0xff,
|
||||
0x84, 0x00, 0x01, 0x02, 0xc0, 0x00, 0x00, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xe5, 0x20, 0xfb, 0xff, 0xff, 0xff, 0xff, 0x3f,
|
||||
0x44, 0xeb, 0x08, 0x6b, 0x08, 0x3b, 0x04, 0xbb,
|
||||
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xff,
|
||||
0xff, 0xff, 0x44, 0xeb, 0x0c, 0x20, 0x0f, 0x52,
|
||||
0x10, 0xd8, 0x00, 0xff, 0xd6, 0x49, 0xc5, 0x00,
|
||||
0x85, 0xdf, 0x04, 0xe3, 0x44, 0x03, 0x67, 0x38,
|
||||
0x30, 0xb0, 0x30, 0xb0, 0xf7, 0xbd, 0xd5, 0x5c,
|
||||
0x4a, 0x9e, 0x29, 0xff, 0xf0, 0x50, 0xf9, 0x85,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0x7f, 0xef, 0xff, 0xff, 0x21, 0x5c, 0xdc, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0x00, 0x36, 0x00, 0x27, 0x9d, 0xf9, 0xc0, 0x64,
|
||||
0x85, 0xcb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xc2, 0xf5, 0x08, 0x00, 0x0c, 0x04, 0x08, 0x08,
|
||||
0x01, 0x00, 0x19, 0x0f, 0x01, 0x01, 0x06, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(mx66l1g45g);
|
||||
|
||||
/*
|
||||
* Windbond
|
||||
*/
|
||||
|
||||
static const uint8_t sfdp_w25q256[] = {
|
||||
0x53, 0x46, 0x44, 0x50, 0x00, 0x01, 0x00, 0xff,
|
||||
0x00, 0x00, 0x01, 0x09, 0x80, 0x00, 0x00, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xe5, 0x20, 0xf3, 0xff, 0xff, 0xff, 0xff, 0x0f,
|
||||
0x44, 0xeb, 0x08, 0x6b, 0x08, 0x3b, 0x42, 0xbb,
|
||||
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00,
|
||||
0xff, 0xff, 0x21, 0xeb, 0x0c, 0x20, 0x0f, 0x52,
|
||||
0x10, 0xd8, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(w25q256);
|
||||
|
||||
static const uint8_t sfdp_w25q512jv[] = {
|
||||
0x53, 0x46, 0x44, 0x50, 0x06, 0x01, 0x01, 0xff,
|
||||
0x00, 0x06, 0x01, 0x10, 0x80, 0x00, 0x00, 0xff,
|
||||
0x84, 0x00, 0x01, 0x02, 0xd0, 0x00, 0x00, 0xff,
|
||||
0x03, 0x00, 0x01, 0x02, 0xf0, 0x00, 0x00, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xe5, 0x20, 0xfb, 0xff, 0xff, 0xff, 0xff, 0x1f,
|
||||
0x44, 0xeb, 0x08, 0x6b, 0x08, 0x3b, 0x42, 0xbb,
|
||||
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00,
|
||||
0xff, 0xff, 0x40, 0xeb, 0x0c, 0x20, 0x0f, 0x52,
|
||||
0x10, 0xd8, 0x00, 0x00, 0x36, 0x02, 0xa6, 0x00,
|
||||
0x82, 0xea, 0x14, 0xe2, 0xe9, 0x63, 0x76, 0x33,
|
||||
0x7a, 0x75, 0x7a, 0x75, 0xf7, 0xa2, 0xd5, 0x5c,
|
||||
0x19, 0xf7, 0x4d, 0xff, 0xe9, 0x70, 0xf9, 0xa5,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0x0a, 0xf0, 0xff, 0x21, 0xff, 0xdc, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(w25q512jv);
|
||||
|
||||
static const uint8_t sfdp_w25q01jvq[] = {
|
||||
0x53, 0x46, 0x44, 0x50, 0x06, 0x01, 0x01, 0xff,
|
||||
0x00, 0x06, 0x01, 0x10, 0x80, 0x00, 0x00, 0xff,
|
||||
0x84, 0x00, 0x01, 0x02, 0xd0, 0x00, 0x00, 0xff,
|
||||
0x03, 0x00, 0x01, 0x02, 0xf0, 0x00, 0x00, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xe5, 0x20, 0xfb, 0xff, 0xff, 0xff, 0xff, 0x3f,
|
||||
0x44, 0xeb, 0x08, 0x6b, 0x08, 0x3b, 0x42, 0xbb,
|
||||
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00,
|
||||
0xff, 0xff, 0x40, 0xeb, 0x0c, 0x20, 0x0f, 0x52,
|
||||
0x10, 0xd8, 0x00, 0x00, 0x36, 0x02, 0xa6, 0x00,
|
||||
0x82, 0xea, 0x14, 0xe2, 0xe9, 0x63, 0x76, 0x33,
|
||||
0x7a, 0x75, 0x7a, 0x75, 0xf7, 0xa2, 0xd5, 0x5c,
|
||||
0x19, 0xf7, 0x4d, 0xff, 0xe9, 0x70, 0xf9, 0xa5,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0x0a, 0xf0, 0xff, 0x21, 0xff, 0xdc, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
define_sfdp_read(w25q01jvq);
|
||||
29
hw/block/m25p80_sfdp.h
Normal file
29
hw/block/m25p80_sfdp.h
Normal file
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* M25P80 SFDP
|
||||
*
|
||||
* Copyright (c) 2020, IBM Corporation.
|
||||
*
|
||||
* This code is licensed under the GPL version 2 or later. See the
|
||||
* COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef HW_M25P80_SFDP_H
|
||||
#define HW_M25P80_SFDP_H
|
||||
|
||||
/*
|
||||
* SFDP area has a 3 bytes address space.
|
||||
*/
|
||||
#define M25P80_SFDP_MAX_SIZE (1 << 24)
|
||||
|
||||
uint8_t m25p80_sfdp_n25q256a(uint32_t addr);
|
||||
|
||||
uint8_t m25p80_sfdp_mx25l25635e(uint32_t addr);
|
||||
uint8_t m25p80_sfdp_mx25l25635f(uint32_t addr);
|
||||
uint8_t m25p80_sfdp_mx66l1g45g(uint32_t addr);
|
||||
|
||||
uint8_t m25p80_sfdp_w25q256(uint32_t addr);
|
||||
uint8_t m25p80_sfdp_w25q512jv(uint32_t addr);
|
||||
|
||||
uint8_t m25p80_sfdp_w25q01jvq(uint32_t addr);
|
||||
|
||||
#endif
|
||||
@ -12,6 +12,7 @@ softmmu_ss.add(when: 'CONFIG_ONENAND', if_true: files('onenand.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_PFLASH_CFI01', if_true: files('pflash_cfi01.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_PFLASH_CFI02', if_true: files('pflash_cfi02.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80_sfdp.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_XEN', if_true: files('xen-block.c'))
|
||||
softmmu_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
|
||||
|
||||
@ -80,5 +80,6 @@ m25p80_page_program(void *s, uint32_t addr, uint8_t tx) "[%p] page program cur_a
|
||||
m25p80_transfer(void *s, uint8_t state, uint32_t len, uint8_t needed, uint32_t pos, uint32_t cur_addr, uint8_t t) "[%p] Transfer state 0x%"PRIx8" len 0x%"PRIx32" needed 0x%"PRIx8" pos 0x%"PRIx32" addr 0x%"PRIx32" tx 0x%"PRIx8
|
||||
m25p80_read_byte(void *s, uint32_t addr, uint8_t v) "[%p] Read byte 0x%"PRIx32"=0x%"PRIx8
|
||||
m25p80_read_data(void *s, uint32_t pos, uint8_t v) "[%p] Read data 0x%"PRIx32"=0x%"PRIx8
|
||||
m25p80_read_sfdp(void *s, uint32_t addr, uint8_t v) "[%p] Read SFDP 0x%"PRIx32"=0x%"PRIx8
|
||||
m25p80_binding(void *s) "[%p] Binding to IF_MTD drive"
|
||||
m25p80_binding_no_bdrv(void *s) "[%p] No BDRV - binding to RAM"
|
||||
|
||||
@ -1131,7 +1131,9 @@ static int aspeed_i2c_bus_slave_event(I2CSlave *slave, enum i2c_event event)
|
||||
AspeedI2CBus *bus = ASPEED_I2C_BUS(qbus->parent);
|
||||
uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus);
|
||||
uint32_t reg_byte_buf = aspeed_i2c_bus_byte_buf_offset(bus);
|
||||
uint32_t value;
|
||||
uint32_t reg_dev_addr = aspeed_i2c_bus_dev_addr_offset(bus);
|
||||
uint32_t dev_addr = SHARED_ARRAY_FIELD_EX32(bus->regs, reg_dev_addr,
|
||||
SLAVE_DEV_ADDR1);
|
||||
|
||||
if (aspeed_i2c_is_new_mode(bus->controller)) {
|
||||
return aspeed_i2c_bus_new_slave_event(bus, event);
|
||||
@ -1139,8 +1141,8 @@ static int aspeed_i2c_bus_slave_event(I2CSlave *slave, enum i2c_event event)
|
||||
|
||||
switch (event) {
|
||||
case I2C_START_SEND_ASYNC:
|
||||
value = SHARED_ARRAY_FIELD_EX32(bus->regs, reg_byte_buf, TX_BUF);
|
||||
SHARED_ARRAY_FIELD_DP32(bus->regs, reg_byte_buf, RX_BUF, value << 1);
|
||||
/* Bit[0] == 0 indicates "send". */
|
||||
SHARED_ARRAY_FIELD_DP32(bus->regs, reg_byte_buf, RX_BUF, dev_addr << 1);
|
||||
|
||||
ARRAY_FIELD_DP32(bus->regs, I2CD_INTR_STS, SLAVE_ADDR_RX_MATCH, 1);
|
||||
SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, RX_DONE, 1);
|
||||
|
||||
@ -388,7 +388,7 @@ static inline int aspeed_smc_flash_cmd(const AspeedSMCFlash *fl)
|
||||
static inline int aspeed_smc_flash_addr_width(const AspeedSMCFlash *fl)
|
||||
{
|
||||
const AspeedSMCState *s = fl->controller;
|
||||
AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
|
||||
AspeedSMCClass *asc = fl->asc;
|
||||
|
||||
if (asc->addr_width) {
|
||||
return asc->addr_width(s);
|
||||
@ -420,7 +420,7 @@ static uint32_t aspeed_smc_check_segment_addr(const AspeedSMCFlash *fl,
|
||||
uint32_t addr)
|
||||
{
|
||||
const AspeedSMCState *s = fl->controller;
|
||||
AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
|
||||
AspeedSMCClass *asc = fl->asc;
|
||||
AspeedSegments seg;
|
||||
|
||||
asc->reg_to_segment(s, s->regs[R_SEG_ADDR0 + fl->cs], &seg);
|
||||
@ -1234,7 +1234,6 @@ static const TypeInfo aspeed_smc_info = {
|
||||
static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
|
||||
{
|
||||
AspeedSMCFlash *s = ASPEED_SMC_FLASH(dev);
|
||||
AspeedSMCClass *asc;
|
||||
g_autofree char *name = g_strdup_printf(TYPE_ASPEED_SMC_FLASH ".%d", s->cs);
|
||||
|
||||
if (!s->controller) {
|
||||
@ -1242,14 +1241,14 @@ static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
|
||||
return;
|
||||
}
|
||||
|
||||
asc = ASPEED_SMC_GET_CLASS(s->controller);
|
||||
s->asc = ASPEED_SMC_GET_CLASS(s->controller);
|
||||
|
||||
/*
|
||||
* Use the default segment value to size the memory region. This
|
||||
* can be changed by FW at runtime.
|
||||
*/
|
||||
memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_flash_ops,
|
||||
s, name, asc->segments[s->cs].size);
|
||||
s, name, s->asc->segments[s->cs].size);
|
||||
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
|
||||
}
|
||||
|
||||
|
||||
18
hw/ssi/ssi.c
18
hw/ssi/ssi.c
@ -38,9 +38,8 @@ static void ssi_cs_default(void *opaque, int n, int level)
|
||||
bool cs = !!level;
|
||||
assert(n == 0);
|
||||
if (s->cs != cs) {
|
||||
SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s);
|
||||
if (ssc->set_cs) {
|
||||
ssc->set_cs(s, cs);
|
||||
if (s->spc->set_cs) {
|
||||
s->spc->set_cs(s, cs);
|
||||
}
|
||||
}
|
||||
s->cs = cs;
|
||||
@ -48,11 +47,11 @@ static void ssi_cs_default(void *opaque, int n, int level)
|
||||
|
||||
static uint32_t ssi_transfer_raw_default(SSIPeripheral *dev, uint32_t val)
|
||||
{
|
||||
SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(dev);
|
||||
SSIPeripheralClass *ssc = dev->spc;
|
||||
|
||||
if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
|
||||
(!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
|
||||
ssc->cs_polarity == SSI_CS_NONE) {
|
||||
(!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
|
||||
ssc->cs_polarity == SSI_CS_NONE) {
|
||||
return ssc->transfer(dev, val);
|
||||
}
|
||||
return 0;
|
||||
@ -67,6 +66,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
|
||||
ssc->cs_polarity != SSI_CS_NONE) {
|
||||
qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
|
||||
}
|
||||
s->spc = ssc;
|
||||
|
||||
ssc->realize(s, errp);
|
||||
}
|
||||
@ -115,13 +115,11 @@ uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
|
||||
{
|
||||
BusState *b = BUS(bus);
|
||||
BusChild *kid;
|
||||
SSIPeripheralClass *ssc;
|
||||
uint32_t r = 0;
|
||||
|
||||
QTAILQ_FOREACH(kid, &b->children, sibling) {
|
||||
SSIPeripheral *peripheral = SSI_PERIPHERAL(kid->child);
|
||||
ssc = SSI_PERIPHERAL_GET_CLASS(peripheral);
|
||||
r |= ssc->transfer_raw(peripheral, val);
|
||||
SSIPeripheral *p = SSI_PERIPHERAL(kid->child);
|
||||
r |= p->spc->transfer_raw(p, val);
|
||||
}
|
||||
|
||||
return r;
|
||||
|
||||
@ -130,6 +130,7 @@ REG32(I2CD_CMD, 0x14) /* I2CD Command/Status */
|
||||
SHARED_FIELD(M_TX_CMD, 1, 1)
|
||||
SHARED_FIELD(M_START_CMD, 0, 1)
|
||||
REG32(I2CD_DEV_ADDR, 0x18) /* Slave Device Address */
|
||||
SHARED_FIELD(SLAVE_DEV_ADDR1, 0, 7)
|
||||
REG32(I2CD_POOL_CTRL, 0x1C) /* Pool Buffer Control */
|
||||
SHARED_FIELD(RX_COUNT, 24, 5)
|
||||
SHARED_FIELD(RX_SIZE, 16, 5)
|
||||
|
||||
@ -30,6 +30,7 @@
|
||||
#include "qom/object.h"
|
||||
|
||||
struct AspeedSMCState;
|
||||
struct AspeedSMCClass;
|
||||
|
||||
#define TYPE_ASPEED_SMC_FLASH "aspeed.smc.flash"
|
||||
OBJECT_DECLARE_SIMPLE_TYPE(AspeedSMCFlash, ASPEED_SMC_FLASH)
|
||||
@ -37,6 +38,7 @@ struct AspeedSMCFlash {
|
||||
SysBusDevice parent_obj;
|
||||
|
||||
struct AspeedSMCState *controller;
|
||||
struct AspeedSMCClass *asc;
|
||||
uint8_t cs;
|
||||
|
||||
MemoryRegion mmio;
|
||||
|
||||
@ -59,6 +59,9 @@ struct SSIPeripheralClass {
|
||||
struct SSIPeripheral {
|
||||
DeviceState parent_obj;
|
||||
|
||||
/* cache the class */
|
||||
SSIPeripheralClass *spc;
|
||||
|
||||
/* Chip select state */
|
||||
bool cs;
|
||||
};
|
||||
|
||||
@ -92,7 +92,7 @@ class AST2x00Machine(QemuSystemTest):
|
||||
|
||||
self.do_test_arm_aspeed(image_path)
|
||||
|
||||
def do_test_arm_aspeed_buidroot_start(self, image, cpu_id):
|
||||
def do_test_arm_aspeed_buildroot_start(self, image, cpu_id):
|
||||
self.require_netdev('user')
|
||||
|
||||
self.vm.set_console()
|
||||
@ -111,11 +111,11 @@ class AST2x00Machine(QemuSystemTest):
|
||||
exec_command(self, 'root')
|
||||
time.sleep(0.1)
|
||||
|
||||
def do_test_arm_aspeed_buidroot_poweroff(self):
|
||||
def do_test_arm_aspeed_buildroot_poweroff(self):
|
||||
exec_command_and_wait_for_pattern(self, 'poweroff',
|
||||
'reboot: System halted');
|
||||
|
||||
def test_arm_ast2500_evb_builroot(self):
|
||||
def test_arm_ast2500_evb_buildroot(self):
|
||||
"""
|
||||
:avocado: tags=arch:arm
|
||||
:avocado: tags=machine:ast2500-evb
|
||||
@ -129,7 +129,7 @@ class AST2x00Machine(QemuSystemTest):
|
||||
|
||||
self.vm.add_args('-device',
|
||||
'tmp105,bus=aspeed.i2c.bus.3,address=0x4d,id=tmp-test');
|
||||
self.do_test_arm_aspeed_buidroot_start(image_path, '0x0')
|
||||
self.do_test_arm_aspeed_buildroot_start(image_path, '0x0')
|
||||
|
||||
exec_command_and_wait_for_pattern(self,
|
||||
'echo lm75 0x4d > /sys/class/i2c-dev/i2c-3/device/new_device',
|
||||
@ -141,9 +141,9 @@ class AST2x00Machine(QemuSystemTest):
|
||||
exec_command_and_wait_for_pattern(self,
|
||||
'cat /sys/class/hwmon/hwmon1/temp1_input', '18000')
|
||||
|
||||
self.do_test_arm_aspeed_buidroot_poweroff()
|
||||
self.do_test_arm_aspeed_buildroot_poweroff()
|
||||
|
||||
def test_arm_ast2600_evb_builroot(self):
|
||||
def test_arm_ast2600_evb_buildroot(self):
|
||||
"""
|
||||
:avocado: tags=arch:arm
|
||||
:avocado: tags=machine:ast2600-evb
|
||||
@ -159,7 +159,7 @@ class AST2x00Machine(QemuSystemTest):
|
||||
'tmp105,bus=aspeed.i2c.bus.3,address=0x4d,id=tmp-test');
|
||||
self.vm.add_args('-device',
|
||||
'ds1338,bus=aspeed.i2c.bus.3,address=0x32');
|
||||
self.do_test_arm_aspeed_buidroot_start(image_path, '0xf00')
|
||||
self.do_test_arm_aspeed_buildroot_start(image_path, '0xf00')
|
||||
|
||||
exec_command_and_wait_for_pattern(self,
|
||||
'echo lm75 0x4d > /sys/class/i2c-dev/i2c-3/device/new_device',
|
||||
@ -177,7 +177,7 @@ class AST2x00Machine(QemuSystemTest):
|
||||
year = time.strftime("%Y")
|
||||
exec_command_and_wait_for_pattern(self, 'hwclock -f /dev/rtc1', year);
|
||||
|
||||
self.do_test_arm_aspeed_buidroot_poweroff()
|
||||
self.do_test_arm_aspeed_buildroot_poweroff()
|
||||
|
||||
|
||||
class AST2x00MachineSDK(QemuSystemTest):
|
||||
|
||||
Loading…
Reference in New Issue
Block a user